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Message-ID: <5bd05ba2-fd88-4e5c-baed-9971ff917484@lunn.ch>
Date:   Fri, 4 Aug 2023 14:04:02 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Choong Yong Liang <yong.liang.choong@...ux.intel.com>
Cc:     Rajneesh Bhardwaj <irenic.rajneesh@...il.com>,
        David E Box <david.e.box@...ux.intel.com>,
        Hans de Goede <hdegoede@...hat.com>,
        Mark Gross <markgross@...nel.org>,
        Jose Abreu <Jose.Abreu@...opsys.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Marek BehĂșn <kabel@...nel.org>,
        Jean Delvare <jdelvare@...e.com>,
        Guenter Roeck <linux@...ck-us.net>,
        Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Jose Abreu <joabreu@...opsys.com>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Richard Cochran <richardcochran@...il.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Alexei Starovoitov <ast@...nel.org>,
        Daniel Borkmann <daniel@...earbox.net>,
        Jesper Dangaard Brouer <hawk@...nel.org>,
        John Fastabend <john.fastabend@...il.com>,
        Wong Vee Khee <veekhee@...le.com>,
        Jon Hunter <jonathanh@...dia.com>,
        Jesse Brandeburg <jesse.brandeburg@...el.com>,
        Revanth Kumar Uppala <ruppala@...dia.com>,
        Shenwei Wang <shenwei.wang@....com>,
        Andrey Konovalov <andrey.konovalov@...aro.org>,
        Jochen Henneberg <jh@...neberg-systemdesign.com>,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org,
        platform-driver-x86@...r.kernel.org, linux-hwmon@...r.kernel.org,
        bpf@...r.kernel.org, Voon Wei Feng <weifeng.voon@...el.com>,
        Tan Tee Min <tee.min.tan@...ux.intel.com>,
        Michael Sit Wei Hong <michael.wei.hong.sit@...el.com>,
        Lai Peter Jun Ann <jun.ann.lai@...el.com>
Subject: Re: [PATCH net-next v2 0/5] TSN auto negotiation between 1G and 2.5G

On Fri, Aug 04, 2023 at 04:45:22PM +0800, Choong Yong Liang wrote:
> Intel platforms’ integrated Gigabit Ethernet controllers support
> 2.5Gbps mode statically using BIOS programming. In the current
> implementation, the BIOS menu provides an option to select between
> 10/100/1000Mbps and 2.5Gbps modes. Based on the selection, the BIOS
> programs the Phase Lock Loop (PLL) registers. The BIOS also read the
> TSN lane registers from Flexible I/O Adapter (FIA) block and provided
> 10/100/1000Mbps/2.5Gbps information to the stmmac driver. But
> auto-negotiation between 10/100/1000Mbps and 2.5Gbps is not allowed.
> The new proposal is to support auto-negotiation between 10/100/1000Mbps
> and 2.5Gbps . Auto-negotiation between 10, 100, 1000Mbps will use
> in-band auto negotiation. Auto-negotiation between 10/100/1000Mbps and
> 2.5Gbps will work as the following proposed flow, the stmmac driver reads
> the PHY link status registers then identifies the negotiated speed.
> Based on the speed stmmac driver will identify TSN lane registers from
> FIA then send IPC command to the Power Management controller (PMC)
> through PMC driver/API. PMC will act as a proxy to programs the
> PLL registers.

Have you considered using out of band for all link modes? You might
end up with a cleaner architecture, and not need any phylink/phylib
hacks.

	Andrew

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