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Message-ID: <90fec7158aade0020cf7314b7043f3eeb007ff7a.camel@mediatek.com>
Date: Sat, 5 Aug 2023 08:10:40 +0000
From: Jason-JH Lin (林睿祥)
<Jason-JH.Lin@...iatek.com>
To: CK Hu (胡俊光) <ck.hu@...iatek.com>,
"amergnat@...libre.com" <amergnat@...libre.com>,
"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>,
"angelogioacchino.delregno@...labora.com"
<angelogioacchino.delregno@...labora.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mediatek@...ts.infradead.org"
<linux-mediatek@...ts.infradead.org>,
Singo Chang (張興國)
<Singo.Chang@...iatek.com>,
Johnson Wang (王聖鑫)
<Johnson.Wang@...iatek.com>,
Jason-ch Chen (陳建豪)
<Jason-ch.Chen@...iatek.com>,
Shawn Sung (宋孝謙)
<Shawn.Sung@...iatek.com>,
Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"matthias.bgg@...il.com" <matthias.bgg@...il.com>
Subject: Re: [PATCH v3 2/2] drm/mediatek: Fix iommu fault during crtc enabling
Hi CK,
On Wed, 2023-07-26 at 06:56 +0000, CK Hu (胡俊光) wrote:
> Hi, Jason:
>
> On Tue, 2023-07-18 at 15:48 +0000, Jason-JH Lin (林睿祥) wrote:
> > Hi CK,
> >
> > Thanks for the reviews.
> >
> > On Fri, 2023-07-14 at 06:57 +0000, CK Hu (胡俊光) wrote:
> > > Hi, Jason:
> > >
> > > On Mon, 2023-07-10 at 17:32 +0800, Jason-JH.Lin wrote:
> > > > OVL layer should not be enabled before crtc is enabled.
> > > > The plane_state of drm_atomic_state is not sync to
> > > > the plane_state stored in mtk_crtc during crtc enabling,
> > > > so just set all planes to disabled.
> > > >
> > > > Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek
> > > > SoC
> > > > MT8173.")
> > > > Signed-off-by: Jason-JH.Lin <jason-jh.lin@...iatek.com>
> > > > ---
> > > > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 3 +++
> > > > 1 file changed, 3 insertions(+)
> > > >
> > > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > > > b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > > > index d40142842f85..51d10e65004e 100644
> > > > --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> > > > @@ -410,6 +410,9 @@ static int mtk_crtc_ddp_hw_init(struct
> > > > mtk_drm_crtc *mtk_crtc)
> > > > unsigned int local_layer;
> > > >
> > > > plane_state = to_mtk_plane_state(plane->state);
> > > > +
> > > > + /* should not enable layer before crtc enabled
> > > > */
> > > > + plane_state->pending.enable = false;
> > >
> > > All plane has been disable in mtk_drm_crtc_atomic_disable(),
> > > doesn't
> > > it?
> > >
> >
> > Yes, it does.
> >
> > But somehow the plane_state get from to_mtk_plane_state(mtk_crtc-
> > > planes[i]) is not synced to the plane_state in atomic_state.
> >
> > So I think we should disable ovl layer to avoid incorrect
> > plane_state
> > applying to OVL HW at the HW init stage.
>
> Do you mean plane_state in atomic_state is correct but it's not
> synced
> to mtk_crtc->planes?
Yes.
> If so, the atomic_state is bypassed into
> mtk_drm_crtc_atomic_eanble() and you could sync it here.
>
I'vd tried this method. It can also fix this problem.
So I'll use atomic_state to update mtk_plane_state here.
Thanks~
Regards,
Jason-JH.Lin
> Regards,
> CK
>
> >
> > Regards,
> > Jason-JH.Lin
> >
> >
> > > Regards,
> > > CK
> > >
> > > > comp = mtk_drm_ddp_comp_for_plane(crtc, plane,
> > > > &local_layer);
> > > > if (comp)
> > > > mtk_ddp_comp_layer_config(comp,
> > > > local_layer,
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