linux-kernel - Re: [PATCH] arm64: dts: imx8mp-beacon: Configure 100MHz PCIe Ref Clk

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CAHCN7xLcZvcB0fmoxK2EuLxmPQGCtCKcfPDozhDwYSX4fJutrw@mail.gmail.com>
Date:   Sun, 6 Aug 2023 17:20:17 -0500
From:   Adam Ford <aford173@...il.com>
To:     Fabio Estevam <festevam@...il.com>
Cc:     linux-arm-kernel@...ts.infradead.org, aford@...conembedded.com,
        cstevens@...conembedded.com, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        NXP Linux Team <linux-imx@....com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mp-beacon: Configure 100MHz PCIe Ref Clk

On Sun, Aug 6, 2023 at 5:03 PM Fabio Estevam <festevam@...il.com> wrote:
>
> Hi Adam,
>
> On Sun, Aug 6, 2023 at 4:06 PM Adam Ford <aford173@...il.com> wrote:
>
> >  &pcie_phy {
> > +       fsl,clkreq-unsupported;
> >         fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> > -       clocks = <&pcie0_refclk>;
>
> Should the pcie0_refclk node be also removed? It seems to be unused
> after this patch.

Oops, you're right.  I will send a V2.

>
> > +       clocks = <&pcieclk 1>;
>
> Isn't clocks = <&pcieclk>; (without the extra 1) enough?

The clock generator has two outputs called DIF0 and DIF1.  This
hardware uses DIF1 for the reference clock, so I need to specify
output 1.

adam