lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CADnq5_NdP=Uk3JCFwvO12nOWGJuFh9ZWaEuH7zSWsKAM9hufXQ@mail.gmail.com>
Date:   Mon, 7 Aug 2023 13:33:38 -0400
From:   Alex Deucher <alexdeucher@...il.com>
To:     Ran Sun <sunran001@...suo.com>
Cc:     alexander.deucher@....com, dri-devel@...ts.freedesktop.org,
        amd-gfx@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/amdgpu: Clean up errors in vcn_v3_0.c

Applied.  Thanks!

On Wed, Aug 2, 2023 at 3:53 AM Ran Sun <sunran001@...suo.com> wrote:
>
> Fix the following errors reported by checkpatch:
>
> ERROR: space required before the open brace '{'
> ERROR: "foo * bar" should be "foo *bar"
> ERROR: space required before the open parenthesis '('
> ERROR: that open brace { should be on the previous line
>
> Signed-off-by: Ran Sun <sunran001@...suo.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 11 +++++------
>  1 file changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> index b76ba21b5a89..1e7613bb80ae 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> @@ -1105,7 +1105,7 @@ static int vcn_v3_0_start(struct amdgpu_device *adev)
>                 if (adev->vcn.harvest_config & (1 << i))
>                         continue;
>
> -               if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG){
> +               if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) {
>                         r = vcn_v3_0_start_dpg_mode(adev, i, adev->vcn.indirect_sram);
>                         continue;
>                 }
> @@ -1789,7 +1789,7 @@ static int vcn_v3_0_dec_msg(struct amdgpu_cs_parser *p, struct amdgpu_job *job,
>         struct amdgpu_bo *bo;
>         uint64_t start, end;
>         unsigned int i;
> -       void * ptr;
> +       void *ptr;
>         int r;
>
>         addr &= AMDGPU_GMC_HOLE_MASK;
> @@ -2129,7 +2129,7 @@ static int vcn_v3_0_set_powergating_state(void *handle,
>                 return 0;
>         }
>
> -       if(state == adev->vcn.cur_state)
> +       if (state == adev->vcn.cur_state)
>                 return 0;
>
>         if (state == AMD_PG_STATE_GATE)
> @@ -2137,7 +2137,7 @@ static int vcn_v3_0_set_powergating_state(void *handle,
>         else
>                 ret = vcn_v3_0_start(adev);
>
> -       if(!ret)
> +       if (!ret)
>                 adev->vcn.cur_state = state;
>
>         return ret;
> @@ -2228,8 +2228,7 @@ static const struct amd_ip_funcs vcn_v3_0_ip_funcs = {
>         .set_powergating_state = vcn_v3_0_set_powergating_state,
>  };
>
> -const struct amdgpu_ip_block_version vcn_v3_0_ip_block =
> -{
> +const struct amdgpu_ip_block_version vcn_v3_0_ip_block = {
>         .type = AMD_IP_BLOCK_TYPE_VCN,
>         .major = 3,
>         .minor = 0,
> --
> 2.17.1
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ