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Message-Id: <e5b7d4fe-c99d-e545-875-33ad683c62e@linux.microsoft.com>
Date: Mon, 7 Aug 2023 16:37:45 -0700
From: Easwar Hariharan <eahariha@...ux.microsoft.com>
To: robin.murphy@....com
Cc: catalin.marinas@....com, corbet@....net,
eahariha@...ux.microsoft.com, easwar.hariharan@...rosoft.com,
iommu@...ts.linux-foundation.org, iommu@...ts.linux.dev,
joro@...tes.org, krckatom@...zon.de,
linux-arm-kernel@...ts.infradead.org, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, nicolinc@...dia.com,
sashal@...nel.org, stable@...r.kernel.org, will@...nel.org,
yangyicong@...ilicon.com
Subject: Re: [PATCH v3 5.15 4/6] iommu/arm-smmu-v3: Document MMU-700 erratum 2812531
On Mon, 7 Aug 2023, Robin Murphy wrote:
> On 2023-08-02 18:02, Easwar Hariharan wrote:
>> From: Robin Murphy <robin.murphy@....com>
>>
>> commit 309a15cb16bb075da1c99d46fb457db6a1a2669e upstream
>>
>> To work around MMU-700 erratum 2812531 we need to ensure that certain
>> sequences of commands cannot be issued without an intervening sync. In
>> practice this falls out of our current command-batching machinery
>> anyway - each batch only contains a single type of invalidation command,
>> and ends with a sync. The only exception is when a batch is sufficiently
>> large to need issuing across multiple command queue slots, wherein the
>> earlier slots will not contain a sync and thus may in theory interleave
>> with another batch being issued in parallel to create an affected
>> sequence across the slot boundary.
>>
>> Since MMU-700 supports range invalidate commands and thus we will prefer
>> to use them (which also happens to avoid conditions for other errata),
>> I'm not entirely sure it's even possible for a single high-level
>> invalidate call to generate a batch of more than 63 commands,
>
> Out of interest, have you observed a case where this actually happens?
Not so far, but this was more of a proactive pickup since the erratum was
published and we have some hardware being tested.
>> but for
>> the sake of robustness and documentation, wire up an option to enforce
>> that a sync is always inserted for every slot issued.
>>
>> The other aspect is that the relative order of DVM commands cannot be
>> controlled, so DVM cannot be used. Again that is already the status quo,
>> but since we have at least defined ARM_SMMU_FEAT_BTM, we can explicitly
>> disable it for documentation purposes even if it's not wired up anywhere
>> yet.
>
> Note that there seems to be a slight issue with this patch that I missed,
> under discussion here:
>
> https://lore.kernel.org/linux-iommu/27c895b8-1fb0-be88-8bc3-878d754684c8@huawei.com/T/#t
>
Thanks for the heads up. I did not backport the TTL patch for this series,
or the ones for 6.1 or 6.4, but I'll track the discussion.
Could you CC any fixup patch you may create for this to stable for 5.15+
as well?
Thanks,
Easwar
> Thanks,
> Robin.
>
<snip>
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