linux-kernel - Re: [PATCH v1 2/5] ASoC: dt-bindings: snps,designware-i2s: Add StarFive JH7110 SoC support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Mon, 7 Aug 2023 17:33:07 +0800
From:   Xingyu Wu <xingyu.wu@...rfivetech.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Liam Girdwood <lgirdwood@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Jaroslav Kysela <perex@...ex.cz>,
        Takashi Iwai <tiwai@...e.com>,
        Maxim Kochetkov <fido_max@...ox.ru>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor.dooley@...rochip.com>,
        Emil Renner Berthing <emil.renner.berthing@...onical.com>
CC:     Jose Abreu <joabreu@...opsys.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Walker Chen <walker.chen@...rfivetech.com>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <alsa-devel@...a-project.org>, <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v1 2/5] ASoC: dt-bindings: snps,designware-i2s: Add
 StarFive JH7110 SoC support

On 2023/8/7 17:17, Krzysztof Kozlowski wrote:
> On 07/08/2023 11:03, Xingyu Wu wrote:
>>>>> +  - if:
>>>> +      properties:
>>>> +        compatible:
>>>> +          contains:
>>>> +            const: snps,designware-i2s
>>>> +    then:
>>>> +      properties:
>>>> +        clocks:
>>>> +          maxItems: 1
>>>> +        clock-names:
>>>> +          maxItems: 1
>>>> +        resets:
>>>> +          maxItems: 1
>>>> +    else:
>>>> +      properties:
>>>> +        resets:
>>>> +          minItems: 2
>> 
>> The resets of TX0/TX1/RX on JH7110 SoC are mentioned in 'else' here.
> 
> Ah, its fine. Clocks seem to be also constrained.

OK, I will keep it here.

> 
>> 
>>>> +  - if:
>>>> +      properties:
>>>> +        compatible:
>>>> +          contains:
>>>> +            const: starfive,jh7110-i2stx0
>>>> +    then:
>>>> +      properties:
>>>> +        clocks:
>>>> +          minItems: 5
>>>
>>> Also maxItems
>> 
>> Will add.
>> 
>>>
>>>> +        clock-names:
>>>> +          minItems: 5
>>>
>>> Also maxItems
>> 
>> Will add.
>> 
>>>
>>> What about resets? 1 or 2 items?
>> 
>> Mentioned it in the 'else'.
>> Or do you mean I should drop the 'else' and add the resets in here?
>> And is the same for TX1 and RX?
> 
> It won't be easy to read... probably the binding should be split.
> Anyway, it's fine as is, except the maxItems above.
> 

So I will keep it and just add the maxItems in next version.

Thanks,
Xingyu Wu