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Message-ID: <b62961e38598c771ab83a5b8b158d8fcdf6df963.camel@intel.com>
Date: Mon, 7 Aug 2023 02:16:50 +0000
From: "Huang, Kai" <kai.huang@...el.com>
To: "kirill.shutemov@...ux.intel.com" <kirill.shutemov@...ux.intel.com>
CC: "Hansen, Dave" <dave.hansen@...el.com>,
"Christopherson,, Sean" <seanjc@...gle.com>,
"x86@...nel.org" <x86@...nel.org>, "bp@...en8.de" <bp@...en8.de>,
"peterz@...radead.org" <peterz@...radead.org>,
"hpa@...or.com" <hpa@...or.com>,
"mingo@...hat.com" <mingo@...hat.com>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"pbonzini@...hat.com" <pbonzini@...hat.com>,
"Yamahata, Isaku" <isaku.yamahata@...el.com>,
"sathyanarayanan.kuppuswamy@...ux.intel.com"
<sathyanarayanan.kuppuswamy@...ux.intel.com>,
"n.borisov.lkml@...il.com" <n.borisov.lkml@...il.com>
Subject: Re: [PATCH v3 12/12] x86/virt/tdx: Adjust 'struct tdx_module_args' to
use x86 "register index" layout
On Sun, 2023-08-06 at 14:50 +0300, kirill.shutemov@...ux.intel.com wrote:
> On Wed, Jul 26, 2023 at 11:25:14PM +1200, Kai Huang wrote:
> > For TDX guest, KVM needs to call __seamcall_saved_ret() to make the
> > TDH.VP.ENTER SEAMCALL to enter the guest, possibly taking all registers
> > in 'struct tdx_module_args' as input/output.
> >
> > KVM caches guest's GPRs in 'kvm_vcpu_arch::regs[]', which follows the
> > "register index" hardware layout of x86 GPRs. On the other hand, the
> > __seamcall_saved_ret() takes the pointer of 'struct tdx_module_args' as
> > argument, thus there's a mismatch.
> >
> > KVM could choose to copy input registers from 'vcpu::regs[]' to a
> > 'struct tdx_module_args' and use that as argument to make the SEAMCALL,
> > but such memory copy isn't desired and should be avoided if possible.
>
> I doubt the copy will be visible on any profile.
>
> I personally don't like that kvm implementation detail leaks here. It
> suppose to be generic TDX code.
>
>
Well I kinda agree with you. But it seems Peter wanted this to be done:
https://lore.kernel.org/lkml/a23ce8fd289141cea3a1b4f3dace221dca847238.camel@intel.com/T/#m37f39493e9f2bf0a4c9ccc72aaf4938927375dc1
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