linux-kernel - Re: [PATCH v2 15/28] soc: fsl: cpm1: qmc: Introduce is_tsa

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 8 Aug 2023 08:09:02 +0000
From:   Christophe Leroy <christophe.leroy@...roup.eu>
To:     Herve Codina <herve.codina@...tlin.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>, Andrew Lunn <andrew@...n.ch>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>, Lee Jones <lee@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Qiang Zhao <qiang.zhao@....com>, Li Yang <leoyang.li@....com>,
        Liam Girdwood <lgirdwood@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Jaroslav Kysela <perex@...ex.cz>,
        Takashi Iwai <tiwai@...e.com>,
        Shengjiu Wang <shengjiu.wang@...il.com>,
        Xiubo Li <Xiubo.Lee@...il.com>,
        Fabio Estevam <festevam@...il.com>,
        Nicolin Chen <nicoleotsuka@...il.com>,
        Randy Dunlap <rdunlap@...radead.org>
CC:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "alsa-devel@...a-project.org" <alsa-devel@...a-project.org>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v2 15/28] soc: fsl: cpm1: qmc: Introduce is_tsa_64rxtx
 flag



Le 26/07/2023 à 17:02, Herve Codina a écrit :
> In order to support runtime timeslot route changes, some operations will
> be different according the routing table used (common Rx and Tx table or
> one table for Rx and one for Tx).
> 
> The is_tsa_64rxtx flag is introduced to avoid extra computation to
> determine the table format each time we need it.
> It is set once at initialization.
> 
> Signed-off-by: Herve Codina <herve.codina@...tlin.com>

Reviewed-by: Christophe Leroy <christophe.leroy@...roup.eu>

> ---
>   drivers/soc/fsl/qe/qmc.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c
> index c8ddd2a54bee..dc113463fbc7 100644
> --- a/drivers/soc/fsl/qe/qmc.c
> +++ b/drivers/soc/fsl/qe/qmc.c
> @@ -216,6 +216,7 @@ struct qmc {
>   	u16 __iomem *int_curr;
>   	dma_addr_t int_dma_addr;
>   	size_t int_size;
> +	bool is_tsa_64rxtx;
>   	struct list_head chan_head;
>   	struct qmc_chan *chans[64];
>   };
> @@ -696,7 +697,7 @@ static int qmc_chan_setup_tsa(struct qmc_chan *chan, bool enable)
>   	 * Setup one common 64 entries table or two 32 entries (one for Tx
>   	 * and one for Tx) according to assigned TS numbers.
>   	 */
> -	if (info.nb_tx_ts > 32 || info.nb_rx_ts > 32)
> +	if (chan->qmc->is_tsa_64rxtx)
>   		return qmc_chan_setup_tsa_64rxtx(chan, &info, enable);
>   
>   	ret = qmc_chan_setup_tsa_32rx(chan, &info, enable);
> @@ -1053,6 +1054,7 @@ static int qmc_init_tsa_64rxtx(struct qmc *qmc, const struct tsa_serial_info *in
>   	 * Everything was previously checked, Tx and Rx related stuffs are
>   	 * identical -> Used Rx related stuff to build the table
>   	 */
> +	qmc->is_tsa_64rxtx = true;
>   
>   	/* Invalidate all entries */
>   	for (i = 0; i < 64; i++)
> @@ -1081,6 +1083,7 @@ static int qmc_init_tsa_32rx_32tx(struct qmc *qmc, const struct tsa_serial_info
>   	 * Use a Tx 32 entries table and a Rx 32 entries table.
>   	 * Everything was previously checked.
>   	 */
> +	qmc->is_tsa_64rxtx = false;
>   
>   	/* Invalidate all entries */
>   	for (i = 0; i < 32; i++) {