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Message-ID: <32d1a742-a984-bead-ef60-d5edac6b5fd9@quicinc.com>
Date:   Wed, 9 Aug 2023 10:06:01 -0700
From:   "Bao D. Nguyen" <quic_nguyenb@...cinc.com>
To:     Nitin Rawat <quic_nitirawa@...cinc.com>, <mani@...nel.org>,
        <quic_cang@...cinc.com>, <quic_asutoshd@...cinc.com>,
        <avri.altman@....com>, <martin.petersen@...cle.com>,
        <beanhuo@...ron.com>
CC:     <bvanassche@....org>, <linux-scsi@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <agross@...nel.org>,
        <andersson@...nel.org>, <konrad.dybcio@...aro.org>,
        <jejb@...ux.ibm.com>, <linux-arm-msm@...r.kernel.org>,
        <quic_ziqichen@...cinc.com>,
        "Naveen Kumar Goud Arepalli" <quic_narepall@...cinc.com>
Subject: Re: [PATCH V3] scsi: ufs: qcom: Align programming sequence as per HW
 spec

On 8/9/2023 8:12 AM, Nitin Rawat wrote:
> Align clock configuration as per Qualcomm UFS controller
> hardware specification.
> 
> This change updates UFS_SYS1CLK_1US, CORE_CLK_1US_CYCLES,
> PA_VS_CORE_CLK_40NS_CYCLES timer configuration for Qunipro
> and UTP to align with Qualcomm UFS HW specification.
> 
> Co-developed-by: Naveen Kumar Goud Arepalli <quic_narepall@...cinc.com>
> Signed-off-by: Naveen Kumar Goud Arepalli <quic_narepall@...cinc.com>
> Signed-off-by: Nitin Rawat <quic_nitirawa@...cinc.com>
> ---
> 

Reviewed-by: Bao D. Nguyen <quic_nguyenb@...cinc.com>

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