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Message-ID: <ZNObxeogswAYyDQ5@nvidia.com>
Date: Wed, 9 Aug 2023 10:59:33 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Will Deacon <will@...nel.org>
Cc: Michael Shavit <mshavit@...gle.com>, iommu@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
robin.murphy@....com, nicolinc@...dia.com, jean-philippe@...aro.org
Subject: Re: [PATCH v5 2/9] iommu/arm-smmu-v3: Replace s1_cfg with cdtab_cfg
On Wed, Aug 09, 2023 at 02:49:41PM +0100, Will Deacon wrote:
> > @@ -1360,10 +1357,14 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
> > !master->stall_enabled)
> > dst[1] |= cpu_to_le64(STRTAB_STE_1_S1STALLD);
> >
> > - val |= (s1_cfg->cdcfg.cdtab_dma & STRTAB_STE_0_S1CTXPTR_MASK) |
> > - FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S1_TRANS) |
> > - FIELD_PREP(STRTAB_STE_0_S1CDMAX, s1_cfg->s1cdmax) |
> > - FIELD_PREP(STRTAB_STE_0_S1FMT, s1_cfg->s1fmt);
> > + val |= (cd_table->cdtab_dma & STRTAB_STE_0_S1CTXPTR_MASK) |
> > + FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S1_TRANS) |
> > + FIELD_PREP(STRTAB_STE_0_S1CDMAX,
> > + cd_table->max_cds_bits) |
> > + FIELD_PREP(STRTAB_STE_0_S1FMT,
> > + cd_table->l1_desc ?
> > + STRTAB_STE_0_S1FMT_64K_L2 :
> > + STRTAB_STE_0_S1FMT_LINEAR);
>
> magically know that we're using 64k tables.
>
> Why is this an improvement to the driver?
Put the above in a function
arm_smmu_get_cd_ste(struct arm_smmu_ctx_desc_cfg *cdtab, void *ste)
And it makes more sense.
We don't need the driver to precompute the "s1_cfg" parameters and
store them in a redundant struct along side the ctx_desc_cfg when we
can compute those same values on the fly with no cost.
Jason
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