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Message-ID: <TYZPR06MB656732D4E436B711CB560B449C12A@TYZPR06MB6567.apcprd06.prod.outlook.com>
Date: Wed, 9 Aug 2023 02:46:34 +0000
From: Dylan Hung <dylan_hung@...eedtech.com>
To: Jeremy Kerr <jk@...econstruct.com.au>,
"alexandre.belloni@...tlin.com" <alexandre.belloni@...tlin.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"krzysztof.kozlowski+dt@...aro.org"
<krzysztof.kozlowski+dt@...aro.org>,
"conor+dt@...nel.org" <conor+dt@...nel.org>,
"joel@....id.au" <joel@....id.au>,
"andrew@...id.au" <andrew@...id.au>,
"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
"linux-i3c@...ts.infradead.org" <linux-i3c@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-aspeed@...ts.ozlabs.org" <linux-aspeed@...ts.ozlabs.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC: BMC-SW <BMC-SW@...eedtech.com>,
"kobedylan@...il.com" <kobedylan@...il.com>
Subject: RE: [PATCH 0/3] Add Aspeed AST2600 I3C support
Hi Jeremy,
> -----Original Message-----
> From: Jeremy Kerr [mailto:jk@...econstruct.com.au]
> Sent: Wednesday, August 9, 2023 8:08 AM
> To: Dylan Hung <dylan_hung@...eedtech.com>;
> alexandre.belloni@...tlin.com; robh+dt@...nel.org;
> krzysztof.kozlowski+dt@...aro.org; conor+dt@...nel.org; joel@....id.au;
> andrew@...id.au; p.zabel@...gutronix.de; linux-i3c@...ts.infradead.org;
> devicetree@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> linux-aspeed@...ts.ozlabs.org; linux-kernel@...r.kernel.org
> Cc: BMC-SW <BMC-SW@...eedtech.com>; kobedylan@...il.com
> Subject: Re: [PATCH 0/3] Add Aspeed AST2600 I3C support
>
> Hi Dylan,
>
> > This patch series introduces the necessary changes to enable I3C
> > support for the Aspeed AST2600 I3C controller. Specifically, it
> > addresses the missing pinctrl configuration and reset control for the
> > I3C functionality.
>
> +1 for the pinctrl changes for the I3C1 and I3C2 controllers (I'll
> review and ack separately). I have been testing on I3C3 and up, but just not
> with the HVI3C on 1 & 2, hence no pinctrl definition there.
>
> However, I don't think the other two are needed.
>
> For 2/3 and 3/3, you're adding a reset control for the global register block
> within the per-controller driver, but we can already do that on a global basis
> with the existing syscon device. Hence this earlier change:
>
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/dri
> vers/mfd/syscon.c?id=7d1e3bd94828ad9fc86f55253cd6fec8edd65394
>
> For this, I have:
>
> &i3c {
> i3c_global: i3c-global {
> compatible = "aspeed,ast2600-i3c-global", "simple-mfd",
> "syscon";
> resets = <&syscon ASPEED_RESET_I3C_DMA>;
> reg = <0x0 0x1000>;
> };
>
> i3c2: i3c-master@...0 {
> compatible = "aspeed,ast2600-i3c";
> reg = <0x4000 0x1000>;
> clocks = <&syscon ASPEED_CLK_GATE_I3C2CLK>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i3c3_default>;
> interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
> aspeed,global-regs = <&i3c_global 2>;
> status = "disabled";
> };
>
> /* ... */
> };
>
> - with no changes needed to any bindings. I haven't needed any other resets;
> are there per-controller resets specified in the HW docs you have?
>
> Does that work for you? If you'd like to test, feel free to use my sample dts at:
>
>
> https://github.com/CodeConstruct/linux/commit/05cac24705fa62d2176ecbb
> bf15d955cfe86e753
>
> Cheers,
>
>
> Jeremy
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