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Message-ID: <20230719-mcrc-upstream-v2-3-4152b987e4c2@ti.com>
Date: Fri, 11 Aug 2023 00:58:50 +0530
From: Kamlesh Gurudasani <kamlesh@...com>
To: Herbert Xu <herbert@...dor.apana.org.au>,
"David S. Miller" <davem@...emloft.net>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Nishanth Menon <nm@...com>,
Vignesh Raghavendra <vigneshr@...com>,
Tero Kristo <kristo@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>
CC: <linux-crypto@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-stm32@...md-mailman.stormreply.com>,
Kamlesh Gurudasani <kamlesh@...com>
Subject: [PATCH v2 3/6] dt-bindings: crypto: Add Texas Instruments MCRC64
Add binding for Texas Instruments MCRC64
MCRC64 engine calculates 64-bit cyclic redundancy checks (CRC)
according to the ISO 3309 standard.
The ISO 3309 64-bit CRC model parameters are as follows:
Generator Polynomial: x^64 + x^4 + x^3 + x + 1
Polynomial Value: 0x000000000000001B
Initial value: 0x0000000000000000
Reflected Input: False
Reflected Output: False
Xor Final: 0x0000000000000000
Signed-off-by: Kamlesh Gurudasani <kamlesh@...com>
---
Documentation/devicetree/bindings/crypto/ti,mcrc64.yaml | 47 +++++++++++++++++++++++++++++++++++++++++++++++
MAINTAINERS | 5 +++++
2 files changed, 52 insertions(+)
diff --git a/Documentation/devicetree/bindings/crypto/ti,mcrc64.yaml b/Documentation/devicetree/bindings/crypto/ti,mcrc64.yaml
new file mode 100644
index 000000000000..38bc7efebd68
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/ti,mcrc64.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/ti,mcrc64.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments MCRC64
+
+description: The MCRC64 engine calculates 64-bit cyclic redundancy checks
+ (CRC) according to the ISO 3309 standard.
+
+maintainers:
+ - Kamlesh Gurudasani <kamlesh@...com>
+
+properties:
+ compatible:
+ const: ti,am62-mcrc64
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - power-domains
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/soc/ti,sci_pm_domain.h>
+
+ crc@...00000 {
+ compatible = "ti,am62-mcrc64";
+ reg = <0x30300000 0x1000>;
+ clocks = <&k3_clks 116 0>;
+ power-domains = <&k3_pds 116 TI_SCI_PD_EXCLUSIVE>;
+ };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 02a3192195af..66b51f43d196 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21481,6 +21481,11 @@ S: Maintained
F: Documentation/devicetree/bindings/iio/adc/ti,lmp92064.yaml
F: drivers/iio/adc/ti-lmp92064.c
+TI MEMORY CYCLIC REDUNDANCY CHECK (MCRC64) DRIVER
+M: Kamlesh Gurudasani <kamlesh@...com>
+S: Maintained
+F: Documentation/devicetree/bindings/crypto/ti,mcrc64.yaml
+
TI PCM3060 ASoC CODEC DRIVER
M: Kirill Marinushkin <kmarinushkin@...dec.com>
L: alsa-devel@...a-project.org (moderated for non-subscribers)
--
2.34.1
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