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Message-ID: <beb378c1-cba4-26a0-0737-90243ec226c1@kernel.org>
Date:   Thu, 10 Aug 2023 05:56:25 -0500
From:   Dinh Nguyen <dinguyen@...nel.org>
To:     Stephen Boyd <sboyd@...nel.org>, niravkumar.l.rabara@...el.com
Cc:     adrian.ho.yin.ng@...el.com, andrew@...n.ch, conor+dt@...nel.org,
        devicetree@...r.kernel.org, krzysztof.kozlowski+dt@...aro.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        mturquette@...libre.com, netdev@...r.kernel.org,
        p.zabel@...gutronix.de, richardcochran@...il.com,
        robh+dt@...nel.org, wen.ping.teh@...el.com
Subject: Re: [PATCH v2 4/5] clk: socfpga: agilex: add clock driver for the
 Agilex5



On 8/9/23 16:28, Stephen Boyd wrote:
> Quoting Dinh Nguyen (2023-08-08 04:03:47)
>> Hi Stephen/Mike,
>>
>> On 7/31/23 20:02, niravkumar.l.rabara@...el.com wrote:
>>> From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
>>>
>>> Add support for Intel's SoCFPGA Agilex5 platform. The clock manager
>>> driver for the Agilex5 is very similar to the Agilex platform,we can
>>> re-use most of the Agilex clock driver.
>>>
>>> Signed-off-by: Teh Wen Ping <wen.ping.teh@...el.com>
>>> Reviewed-by: Dinh Nguyen <dinguyen@...nel.org>
>>> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
>>> ---
>>>    drivers/clk/socfpga/clk-agilex.c | 433 ++++++++++++++++++++++++++++++-
>>>    1 file changed, 431 insertions(+), 2 deletions(-)
>>>
>>
>> If you're ok with this patch, can I take this through armsoc?
>>
> 
> Usually any binding files go through arm-soc and clk tree but the driver
> only goes through clk tree via a PR. Is that possible here?

Ok. Should be fine in this case.

Thanks,
Dinh

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