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Message-ID: <004501d9cb7c$7b6e26e0$724a74a0$@samsung.com>
Date: Thu, 10 Aug 2023 16:49:05 +0530
From: "Alim Akhtar" <alim.akhtar@...sung.com>
To: "'Krzysztof Kozlowski'" <krzysztof.kozlowski@...aro.org>,
"'Sylwester Nawrocki'" <s.nawrocki@...sung.com>,
"'Tomasz Figa'" <tomasz.figa@...il.com>,
"'Chanwoo Choi'" <cw00.choi@...sung.com>,
"'Michael Turquette'" <mturquette@...libre.com>,
"'Stephen Boyd'" <sboyd@...nel.org>,
"'Rob Herring'" <robh+dt@...nel.org>,
"'Conor Dooley'" <conor+dt@...nel.org>,
<linux-samsung-soc@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>
Subject: RE: [PATCH 02/11] clk: samsung: exynos4: do not define number of
clocks in bindings
> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Sent: Tuesday, August 8, 2023 1:57 PM
> To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>; Sylwester
> Nawrocki <s.nawrocki@...sung.com>; Tomasz Figa
> <tomasz.figa@...il.com>; Chanwoo Choi <cw00.choi@...sung.com>; Alim
> Akhtar <alim.akhtar@...sung.com>; Michael Turquette
> <mturquette@...libre.com>; Stephen Boyd <sboyd@...nel.org>; Rob
> Herring <robh+dt@...nel.org>; Conor Dooley <conor+dt@...nel.org>;
> linux-samsung-soc@...r.kernel.org; linux-clk@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org; linux-kernel@...r.kernel.org;
> devicetree@...r.kernel.org
> Subject: [PATCH 02/11] clk: samsung: exynos4: do not define number of
> clocks in bindings
>
> Number of clocks supported by Linux drivers might vary - sometimes we add
> new clocks, not exposed previously. Therefore this number of clocks
should
> not be in the bindings, because otherwise we should not change it.
>
> Define number of clocks per each clock controller inside the driver
directly.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@...sung.com>
> drivers/clk/samsung/clk-exynos4.c | 5 ++++-
> drivers/clk/samsung/clk-exynos4412-isp.c | 5 ++++-
> 2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-
> exynos4.c
> index 43207257a9cc..4ec41221e68f 100644
> --- a/drivers/clk/samsung/clk-exynos4.c
> +++ b/drivers/clk/samsung/clk-exynos4.c
> @@ -135,6 +135,9 @@
> #define PWR_CTRL1_USE_CORE1_WFI (1 << 1)
> #define PWR_CTRL1_USE_CORE0_WFI (1 << 0)
>
> +/* NOTE: Must be equal to the last clock ID increased by one */
> +#define CLKS_NR (CLK_DIV_CORE2 + 1)
> +
> /* the exynos4 soc type */
> enum exynos4_soc {
> EXYNOS4210,
> @@ -1275,7 +1278,7 @@ static void __init exynos4_clk_init(struct
> device_node *np,
> if (!reg_base)
> panic("%s: failed to map registers\n", __func__);
>
> - ctx = samsung_clk_init(NULL, reg_base, CLK_NR_CLKS);
> + ctx = samsung_clk_init(NULL, reg_base, CLKS_NR);
> hws = ctx->clk_data.hws;
>
> samsung_clk_of_register_fixed_ext(ctx,
> exynos4_fixed_rate_ext_clks, diff --git a/drivers/clk/samsung/clk-
> exynos4412-isp.c b/drivers/clk/samsung/clk-exynos4412-isp.c
> index 1470c15e95da..a70c2b06a61a 100644
> --- a/drivers/clk/samsung/clk-exynos4412-isp.c
> +++ b/drivers/clk/samsung/clk-exynos4412-isp.c
> @@ -22,6 +22,9 @@
> #define E4X12_GATE_ISP0 0x0800
> #define E4X12_GATE_ISP1 0x0804
>
> +/* NOTE: Must be equal to the last clock ID increased by one */
> +#define CLKS_NR_ISP (CLK_ISP_DIV_MCUISP1 + 1)
> +
> /*
> * Support for CMU save/restore across system suspends
> */
> @@ -121,7 +124,7 @@ static int __init exynos4x12_isp_clk_probe(struct
> platform_device *pdev)
> if (!exynos4x12_save_isp)
> return -ENOMEM;
>
> - ctx = samsung_clk_init(dev, reg_base, CLK_NR_ISP_CLKS);
> + ctx = samsung_clk_init(dev, reg_base, CLKS_NR_ISP);
>
> platform_set_drvdata(pdev, ctx);
>
> --
> 2.34.1
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