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Message-ID: <af25e724-e06b-e3cd-665b-38281f0c7fad@ideasonboard.com>
Date: Fri, 11 Aug 2023 20:05:58 +0300
From: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
To: Péter Ujfalusi <peter.ujfalusi@...il.com>,
Andrzej Hajda <andrzej.hajda@...el.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Robert Foss <rfoss@...nel.org>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...il.com>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Francesco Dolcini <francesco@...cini.it>
Cc: dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
Aradhya Bhatia <a-bhatia1@...com>
Subject: Re: [PATCH 05/11] drm/bridge: tc358768: Print logical values, not raw
register values
On 11/08/2023 19:31, Péter Ujfalusi wrote:
>
>
> On 04/08/2023 13:44, Tomi Valkeinen wrote:
>> The driver debug prints DSI related timings as raw register values in
>> hex. It is much more useful to see the "logical" value of the timing,
>> not the register value.
>
> I'm a bit confused by the term 'logical' value, I think you meant
> decimal, easier to read by humans numbers.
Not just decimal. Previously the code printed the register values, which
e.g. could contain two values ORed together. So, with "logical" I just
meant the "real" value, instead of "register-encoded".
>> Change the prints to print the values separately, in case a single
>> register contains multiple values, and use %u to have it in a more human
>> consumable form.
>
> But, yes, decimal is better for the dmesg, as I recall I had a tool
> which was using hex numbers so it was better to have the prints also in hex.
>
> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@...il.com>
>
>>
>> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
>> ---
>> drivers/gpu/drm/bridge/tc358768.c | 21 ++++++++++++---------
>> 1 file changed, 12 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c
>> index 9b633038af33..0ef51d04bb21 100644
>> --- a/drivers/gpu/drm/bridge/tc358768.c
>> +++ b/drivers/gpu/drm/bridge/tc358768.c
>> @@ -739,57 +739,59 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
>>
>> /* LP11 > 100us for D-PHY Rx Init */
>> val = tc358768_ns_to_cnt(100 * 1000, dsibclk_nsk) - 1;
>> - dev_dbg(priv->dev, "LINEINITCNT: 0x%x\n", val);
>> + dev_dbg(priv->dev, "LINEINITCNT: %u\n", val);
>> tc358768_write(priv, TC358768_LINEINITCNT, val);
>>
>> /* LPTimeCnt > 50ns */
>> val = tc358768_ns_to_cnt(50, dsibclk_nsk) - 1;
>> lptxcnt = val;
>> - dev_dbg(priv->dev, "LPTXTIMECNT: 0x%x\n", val);
>> + dev_dbg(priv->dev, "LPTXTIMECNT: %u\n", val);
>> tc358768_write(priv, TC358768_LPTXTIMECNT, val);
>>
>> /* 38ns < TCLK_PREPARE < 95ns */
>> val = tc358768_ns_to_cnt(65, dsibclk_nsk) - 1;
>> + dev_dbg(priv->dev, "TCLK_PREPARECNT %u\n", val);
>> /* TCLK_PREPARE + TCLK_ZERO > 300ns */
>> val2 = tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk),
>> dsibclk_nsk) - 2;
>> + dev_dbg(priv->dev, "TCLK_ZEROCNT %u\n", val2);
>> val |= val2 << 8;
>> - dev_dbg(priv->dev, "TCLK_HEADERCNT: 0x%x\n", val);
>> tc358768_write(priv, TC358768_TCLK_HEADERCNT, val);
>>
>> /* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */
>> raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 5;
>> val = clamp(raw_val, 0, 127);
>> - dev_dbg(priv->dev, "TCLK_TRAILCNT: 0x%x\n", val);
>> + dev_dbg(priv->dev, "TCLK_TRAILCNT: %u\n", val);
>> tc358768_write(priv, TC358768_TCLK_TRAILCNT, val);
>>
>> /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */
>> val = 50 + tc358768_to_ns(4 * ui_nsk);
>> val = tc358768_ns_to_cnt(val, dsibclk_nsk) - 1;
>> + dev_dbg(priv->dev, "THS_PREPARECNT %u\n", val);
>> /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */
>> raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), dsibclk_nsk) - 10;
>> val2 = clamp(raw_val, 0, 127);
>> + dev_dbg(priv->dev, "THS_ZEROCNT %u\n", val2);
>> val |= val2 << 8;
>> - dev_dbg(priv->dev, "THS_HEADERCNT: 0x%x\n", val);
>> tc358768_write(priv, TC358768_THS_HEADERCNT, val);
>>
>> /* TWAKEUP > 1ms in lptxcnt steps */
>> val = tc358768_ns_to_cnt(1020000, dsibclk_nsk);
>> val = val / (lptxcnt + 1) - 1;
>> - dev_dbg(priv->dev, "TWAKEUP: 0x%x\n", val);
>> + dev_dbg(priv->dev, "TWAKEUP: %u\n", val);
>> tc358768_write(priv, TC358768_TWAKEUP, val);
>>
>> /* TCLK_POSTCNT > 60ns + 52*UI */
>> val = tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk),
>> dsibclk_nsk) - 3;
>> - dev_dbg(priv->dev, "TCLK_POSTCNT: 0x%x\n", val);
>> + dev_dbg(priv->dev, "TCLK_POSTCNT: %u\n", val);
>> tc358768_write(priv, TC358768_TCLK_POSTCNT, val);
>>
>> /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */
>> raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk),
>> dsibclk_nsk) - 4;
>> val = clamp(raw_val, 0, 15);
>> - dev_dbg(priv->dev, "THS_TRAILCNT: 0x%x\n", val);
>> + dev_dbg(priv->dev, "THS_TRAILCNT: %u\n", val);
>> tc358768_write(priv, TC358768_THS_TRAILCNT, val);
>>
>> val = BIT(0);
>> @@ -803,10 +805,11 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
>> /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */
>> val = tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk * 4);
>> val = tc358768_ns_to_cnt(val, dsibclk_nsk) / 4 - 1;
>> + dev_dbg(priv->dev, "TXTAGOCNT: %u\n", val);
>> val2 = tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk),
>> dsibclk_nsk) - 2;
>> + dev_dbg(priv->dev, "RXTASURECNT: %u\n", val2);
>> val = val << 16 | val2;
>> - dev_dbg(priv->dev, "BTACNTRL1: 0x%x\n", val);
>> tc358768_write(priv, TC358768_BTACNTRL1, val);
>>
>> /* START[0] */
>>
>
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