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Message-Id: <20230811-topic-7280_lmhirq-v1-1-c262b6a25c8f@linaro.org>
Date: Fri, 11 Aug 2023 22:58:22 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: cros-qcom-dts-watchers@...omium.org,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Taniya Das <quic_tdas@...cinc.com>,
Matthias Kaehlcke <mka@...omium.org>
Cc: Marijn Suijten <marijn.suijten@...ainline.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: [PATCH RFT] arm64: dts: qcom: sc7280: Add missing LMH interrupts
Hook up the interrupts that signal the Limits Management Hardware has
started some sort of throttling action.
Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node")
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
test case:
- hammer the CPUs (like compile the Linux kernel)
- watch -n1 "cat /proc/interrupts | grep dcvsh"
- the numbers go up up up up -> good
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 925428a5f6ae..76ed32c8d6f7 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -5363,6 +5363,14 @@ cpufreq_hw: cpufreq@...91000 {
reg = <0 0x18591000 0 0x1000>,
<0 0x18592000 0 0x1000>,
<0 0x18593000 0 0x1000>;
+
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dcvsh-irq-0",
+ "dcvsh-irq-1",
+ "dcvsh-irq-2";
+
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
clock-names = "xo", "alternate";
#freq-domain-cells = <1>;
---
base-commit: 21ef7b1e17d039053edaeaf41142423810572741
change-id: 20230811-topic-7280_lmhirq-e07ad2530387
Best regards,
--
Konrad Dybcio <konrad.dybcio@...aro.org>
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