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Message-ID: <f3711620-d828-ed1b-f676-e5eea8fbe8a6@roeck-us.net>
Date:   Sat, 12 Aug 2023 05:33:09 -0700
From:   Guenter Roeck <linux@...ck-us.net>
To:     Naresh Solanki <naresh.solanki@...ements.com>,
        Jean Delvare <jdelvare@...e.com>,
        krzysztof.kozlowski+dt@...aro.org
Cc:     linux-hwmon@...r.kernel.org,
        Patrick Rudolph <patrick.rudolph@...ements.com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/3] hwmon: (pmbus/tda38640) Add workaround for bug in
 SVID mode

On 8/2/23 12:31, Naresh Solanki wrote:
> From: Patrick Rudolph <patrick.rudolph@...ements.com>
> 
> TDA38640 can operate in either PMBus mode or SVID mode.
> In SVID mode, by design ENABLE pin is the only option for controlling
> the output rail.
> 
> In scenarios that utilizes the chip in SVID mode with ENABLE pin either
> grounded or tied to logic high & software control is desired then use
> dt property 'infineon,en-svid-control' to enable the below workaround.
> 
> The workaround utilizes ENABLE pin polarity flipping to control
> output rail.
> 
> If property 'infineon,en-svid-control' is specified then
> determine if chip is in SVID mode by checking BIT15 of MTP memory offset
> 0x44 as described in the datasheet.
> 
> If chip is in SVID mode then apply the workaround by
> 1. Determine EN pin level
> 2. Maps BIT7 of OPERATION(01h) to EN_PIN_POLARITY(BIT1) of
>     PB_ON_OFF_CONFIG.
> 
> Signed-off-by: Patrick Rudolph <patrick.rudolph@...ements.com>
> Signed-off-by: Naresh Solanki <Naresh.Solanki@...ements.com>

For my reference:

Reviewed-by: Guenter Roeck <linux@...ck-us.net>

We still have to wait for dt patch approval.

Guenter

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