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Message-ID: <473888d3-256f-43ac-bd33-e578918424be@lunn.ch>
Date: Sun, 13 Aug 2023 21:22:27 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Daniel Golle <daniel@...rotopia.org>
Cc: Qingfang Deng <dqfext@...il.com>,
SkyLake Huang <SkyLake.Huang@...iatek.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH net-next v2] net: phy: mediatek-ge-soc: support PHY LEDs
On Sun, Aug 13, 2023 at 08:04:29PM +0100, Daniel Golle wrote:
> On Sun, Aug 13, 2023 at 08:57:01PM +0200, Andrew Lunn wrote:
> > On Sun, Aug 13, 2023 at 05:24:55PM +0100, Daniel Golle wrote:
> > > Implement netdev trigger and primitive bliking offloading as well as
> > > simple set_brigthness function for both PHY LEDs of the in-SoC PHYs
> > > found in MT7981 and MT7988.
> > >
> > > For MT7988, read boottrap register and apply LED polarities accordingly
> >
> > Should this be bootstrap? With an S? boottrap appears quite often in
> > the code, so maybe the datasheet does say boottrap?
>
> Yes, datasheet and vendor code refer to boottrap register which reflects
> the state of the pins used for bootStrapping the SoC...
O.K. So following the datasheet makes sense.
Again, if there is need for a respin, maybe add a comment next to the
#define.
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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