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Message-ID: <ZNpEe+nmXGAkEbAb@smile.fi.intel.com>
Date:   Mon, 14 Aug 2023 18:12:59 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Justin Chen <justin.chen@...adcom.com>
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        linux-serial@...r.kernel.org, opendmb@...il.com,
        Al Cooper <alcooperx@...il.com>,
        Broadcom internal kernel review list 
        <bcm-kernel-feedback-list@...adcom.com>,
        Jiri Slaby <jirislaby@...nel.org>,
        Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
        John Ogness <john.ogness@...utronix.de>,
        Jiaqing Zhao <jiaqing.zhao@...ux.intel.com>,
        "open list:TTY LAYER" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] serial: 8250_bcm7271: improve bcm7271 8250 port

On Sat, Aug 12, 2023 at 09:24:21PM -0700, Justin Chen wrote:
> On Sat, Aug 12, 2023 at 3:50 AM Greg Kroah-Hartman
> <gregkh@...uxfoundation.org> wrote:
> > On Fri, Aug 11, 2023 at 03:14:01PM -0700, Justin Chen wrote:

> > > +     [PORT_BCM7271] = {
> > > +             .name           = "bcm7271_uart",

This is badly named port type.

> > > +             .fifo_size      = 32,
> > > +             .tx_loadsz      = 32,
> > > +             .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01,
> > > +             .rxtrig_bytes   = {1, 8, 16, 30},
> > > +             .flags          = UART_CAP_FIFO | UART_CAP_AFE
> > > +     },
> > >  };

This is almost a dup of PORT_ALTR_16550_F32. Use it if you wish.
You can always rename it if it feels the right thing to do.

But why 8 and not 16 is the default rxtrig?

-- 
With Best Regards,
Andy Shevchenko


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