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Message-ID: <620dae91-3b15-5300-1aae-8e458508f620@quicinc.com>
Date:   Tue, 15 Aug 2023 00:55:23 +0530
From:   Dikshita Agarwal <quic_dikshita@...cinc.com>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>,
        Vikash Garodia <quic_vgarodia@...cinc.com>,
        <stanimir.k.varbanov@...il.com>, <agross@...nel.org>,
        <andersson@...nel.org>, <mchehab@...nel.org>,
        <hans.verkuil@...co.com>, <linux-kernel@...r.kernel.org>,
        <linux-media@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>
Subject: Re: [PATCH 32/33] iris: variant: iris3: implement logic to compute
 clock frequency



On 7/28/2023 11:43 PM, Konrad Dybcio wrote:
> On 28.07.2023 15:23, Vikash Garodia wrote:
>> From: Dikshita Agarwal <quic_dikshita@...cinc.com>
>>
>> This implements the logic to computer the required clock frequency
>> by encoder or decoder for a specific usecase. It considers the input
>> as various parameters configured by client for that usecase.
>>
>> Signed-off-by: Dikshita Agarwal <quic_dikshita@...cinc.com>
>> Signed-off-by: Vikash Garodia <quic_vgarodia@...cinc.com>
>> ---
>>  .../iris/variant/iris3/src/msm_vidc_clock_iris3.c  | 627 +++++++++++++++++++++
>>  1 file changed, 627 insertions(+)
>>  create mode 100644 drivers/media/platform/qcom/iris/variant/iris3/src/msm_vidc_clock_iris3.c
>>
>> diff --git a/drivers/media/platform/qcom/iris/variant/iris3/src/msm_vidc_clock_iris3.c b/drivers/media/platform/qcom/iris/variant/iris3/src/msm_vidc_clock_iris3.c
>> new file mode 100644
>> index 0000000..6665aef
>> --- /dev/null
>> +++ b/drivers/media/platform/qcom/iris/variant/iris3/src/msm_vidc_clock_iris3.c
>> @@ -0,0 +1,627 @@
>> +// SPDX-License-Identifier: GPL-2.0-only
>> +/*
>> + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
>> + */
>> +
>> +#include "msm_vidc_debug.h"
>> +
>> +#define ENABLE_FINEBITRATE_SUBUHD60 0
>> +#include "perf_static_model.h"
>> +
>> +/*
>> + * Chipset Generation Technology: SW/FW overhead profiling
>> + * need update with new numbers
>> + */
>> +static u32 frequency_table_iris3[2][6] = {
> I think it's the third repetition of the same (ftbl + OPP)
> 
Sure, will check and do the needful.

>> +	/* //make lowsvs_D1 as invalid; */
>> +	{533, 444, 366, 338, 240, 0},
>> +	{800, 666, 549, 507, 360, 0},
>> +};
>> +
>> + /* Tensilica cycles */
>> +#define DECODER_VPP_FW_OVERHEAD_IRIS3                                                  66234
>> +
>> +/* Tensilica cycles; this is measured in Lahaina 1stage with FW profiling */
> Is it gonna differ for other SoCs? Especially that 8350 has IRIS2?
> 
>> +#define DECODER_VPPVSP1STAGE_FW_OVERHEAD_IRIS3                                         93000
>> +
>> +#define DECODER_VSP_FW_OVERHEAD_IRIS3 \
>> +	(DECODER_VPPVSP1STAGE_FW_OVERHEAD_IRIS3 - DECODER_VPP_FW_OVERHEAD_IRIS3)
>> +
>> +/* Tensilica cycles; encoder has ARP register */
>> +#define ENCODER_VPP_FW_OVERHEAD_IRIS3                                                  48405
>> +
>> +#define ENCODER_VPPVSP1STAGE_FW_OVERHEAD_IRIS3 \
>> +	(ENCODER_VPP_FW_OVERHEAD_IRIS3 + DECODER_VSP_FW_OVERHEAD_IRIS3)
>> +
>> +#define DECODER_SW_OVERHEAD_IRIS3                                                      489583
>> +#define ENCODER_SW_OVERHEAD_IRIS3                                                      489583
>> +
>> +/* Video IP Core Technology: pipefloor and pipe penlaty */
>> +static u32 decoder_vpp_target_clk_per_mb_iris3 = 200;
> Why is this a variable?

Agree, this doesn't need to be a variable, will convert to macro.
> 
> [...]
> 
>> +
>> +/* 8KUHD60; UHD240; 1080p960  with B */
>> +static u32 fp_pixel_count_bar0 = 3840 * 2160 * 240;
>> +/* 8KUHD60; UHD240; 1080p960  without B */
>> +static u32 fp_pixel_count_bar1 = 3840 * 2160 * 240;
> Not sure what the 'B' is, but the entries are the same. And looks like
> there's:
> 
> - no need for it to be a variable
> - maybe you could make this a macro or just a simple multiplication
> 
B here is B frames and I agree these can be converted to macros.
> [...]
> 
>> +u32 get_bitrate_entry(u32 pixle_count)
> pixle -> pixel, checkpatch should point out typos
> 
> [...]
Ah! Thanks for pointing it out, checkpatch didn't complain about it, will
fix it.
> 
>> +static int calculate_vsp_min_freq(struct api_calculation_input codec_input,
>> +				  struct api_calculation_freq_output *codec_output)
>> +{
>> +	/*
>> +	 * VSP calculation
>> +	 * different methodology from Lahaina
>> +	 */
> Not sure if that comment is useful to the reader.
> 
> [...]
> 
right, will remove
> 
>> +
>> +static u32 calculate_pipe_penalty(struct api_calculation_input codec_input)
>> +{
>> +	u32 pipe_penalty_codec = 0;
>> +
>> +	/* decoder */
>> +	if (codec_input.decoder_or_encoder == CODEC_DECODER)
>> +		pipe_penalty_codec = pipe_penalty_iris3[0][0];
>> +	else
>> +		pipe_penalty_codec = 101;
> Add a define for this magic number?
> 
> Also, return the value instead of assigning it and doing the same
will fix in next version

Thanks,
Dikshita
> 
> 
> Konrad

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