linux-kernel - RE: [PATCH] crypto: caam - increase the domain of write memory barrier to full system

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Message-ID: <AM0PR04MB6004C29F992ACA290E63E687E717A@AM0PR04MB6004.eurprd04.prod.outlook.com>
Date:   Mon, 14 Aug 2023 06:36:03 +0000
From:   Gaurav Jain <gaurav.jain@....com>
To:     Meenakshi Aggarwal <meenakshi.aggarwal@....com>,
        Horia Geanta <horia.geanta@....com>,
        Varun Sethi <V.Sethi@....com>,
        Pankaj Gupta <pankaj.gupta@....com>,
        "herbert@...dor.apana.org.au" <herbert@...dor.apana.org.au>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC:     Iuliana Prodan <iuliana.prodan@....com>
Subject: RE: [PATCH] crypto: caam - increase the domain of write memory
 barrier to full system

Reviewed-by: Gaurav Jain <gaurav.jain@....com>

> -----Original Message-----
> From: Meenakshi Aggarwal <meenakshi.aggarwal@....com>
> Sent: Tuesday, August 8, 2023 4:25 PM
> To: Horia Geanta <horia.geanta@....com>; Varun Sethi <V.Sethi@....com>;
> Pankaj Gupta <pankaj.gupta@....com>; Gaurav Jain <gaurav.jain@....com>;
> herbert@...dor.apana.org.au; davem@...emloft.net; linux-
> crypto@...r.kernel.org; linux-kernel@...r.kernel.org
> Cc: Iuliana Prodan <iuliana.prodan@....com>; Meenakshi Aggarwal
> <meenakshi.aggarwal@....com>
> Subject: [PATCH] crypto: caam - increase the domain of write memory barrier to
> full system
> 
> From: Iuliana Prodan <iuliana.prodan@....com>
> 
> In caam_jr_enqueue, under heavy DDR load, smp_wmb() or dma_wmb() fail to
> make the input ring be updated before the CAAM starts reading it. So, CAAM will
> process, again, an old descriptor address and will put it in the output ring. This
> will make caam_jr_dequeue() to fail, since this old descriptor is not in the
> software ring.
> To fix this, use wmb() which works on the full system instead of inner/outer
> shareable domains.
> 
> Signed-off-by: Iuliana Prodan <iuliana.prodan@....com>
> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@....com>
> ---
>  drivers/crypto/caam/jr.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c index
> 767fbf052536..5507d5d34a4c 100644
> --- a/drivers/crypto/caam/jr.c
> +++ b/drivers/crypto/caam/jr.c
> @@ -464,8 +464,16 @@ int caam_jr_enqueue(struct device *dev, u32 *desc,
>  	 * Guarantee that the descriptor's DMA address has been written to
>  	 * the next slot in the ring before the write index is updated, since
>  	 * other cores may update this index independently.
> +	 *
> +	 * Under heavy DDR load, smp_wmb() or dma_wmb() fail to make the
> input
> +	 * ring be updated before the CAAM starts reading it. So, CAAM will
> +	 * process, again, an old descriptor address and will put it in the
> +	 * output ring. This will make caam_jr_dequeue() to fail, since this
> +	 * old descriptor is not in the software ring.
> +	 * To fix this, use wmb() which works on the full system instead of
> +	 * inner/outer shareable domains.
>  	 */
> -	smp_wmb();
> +	wmb();
> 
>  	jrp->head = (head + 1) & (JOBR_DEPTH - 1);
> 
> --
> 2.25.1