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Message-ID: <d548b6d1-d6e9-40b4-f51e-a0501a8eb9ce@starfivetech.com>
Date: Mon, 14 Aug 2023 15:34:35 +0800
From: Hal Feng <hal.feng@...rfivetech.com>
To: Xingyu Wu <xingyu.wu@...rfivetech.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
"Emil Renner Berthing" <emil.renner.berthing@...onical.com>
CC: Conor Dooley <conor@...nel.org>, <linux-kernel@...r.kernel.org>,
<linux-clk@...r.kernel.org>
Subject: Re: [PATCH v1] clk: starfive: jh7110-sys: Set PLL0 rate to 1.5GHz
On Fri, 11 Aug 2023 11:36:31 +0800, Xingyu Wu wrote:
> Set PLL0 rate to 1.5GHz. Change the parent of cpu_root clock
> and the divider of cpu_core before setting.
>
> Signed-off-by: Xingyu Wu <xingyu.wu@...rfivetech.com>
Reviewed-by: Hal Feng <hal.feng@...rfivetech.com>
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