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Message-Id: <20230814112539.70453-2-sriranjani.p@samsung.com>
Date: Mon, 14 Aug 2023 16:55:36 +0530
From: Sriranjani P <sriranjani.p@...sung.com>
To: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
pabeni@...hat.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
richardcochran@...il.com, alexandre.torgue@...s.st.com,
joabreu@...opsys.com, mcoquelin.stm32@...il.com,
alim.akhtar@...sung.com, linux-fsd@...la.com,
pankaj.dubey@...sung.com, swathi.ks@...sung.com,
ravi.patel@...sung.com
Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Sriranjani P <sriranjani.p@...sung.com>
Subject: [PATCH v3 1/4] dt-bindings: net: Add FSD EQoS device tree bindings
Add FSD Ethernet compatible in Synopsys dt-bindings document. Add FSD
Ethernet YAML schema to enable the DT validation.
Signed-off-by: Pankaj Dubey <pankaj.dubey@...sung.com>
Signed-off-by: Ravi Patel <ravi.patel@...sung.com>
Signed-off-by: Swathi K S <swathi.ks@...sung.com>
Signed-off-by: Sriranjani P <sriranjani.p@...sung.com>
---
.../devicetree/bindings/net/snps,dwmac.yaml | 5 +-
.../devicetree/bindings/net/tesla,ethqos.yaml | 114 ++++++++++++++++++
2 files changed, 117 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/tesla,ethqos.yaml
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index ddf9522a5dc2..0ced7901e644 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -96,6 +96,7 @@ properties:
- snps,dwxgmac
- snps,dwxgmac-2.10
- starfive,jh7110-dwmac
+ - tesla,fsd-ethqos-4.21
reg:
minItems: 1
@@ -117,7 +118,7 @@ properties:
clocks:
minItems: 1
- maxItems: 8
+ maxItems: 10
additionalItems: true
items:
- description: GMAC main clock
@@ -129,7 +130,7 @@ properties:
clock-names:
minItems: 1
- maxItems: 8
+ maxItems: 10
additionalItems: true
contains:
enum:
diff --git a/Documentation/devicetree/bindings/net/tesla,ethqos.yaml b/Documentation/devicetree/bindings/net/tesla,ethqos.yaml
new file mode 100644
index 000000000000..b78829246364
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/tesla,ethqos.yaml
@@ -0,0 +1,114 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/tesla,ethqos.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: FSD Ethernet Quality of Service
+
+maintainers:
+ - Sriranjani P <sriranjani.p@...sung.com>
+ - Swathi K S <swathi.ks@...sung.com>
+
+description:
+ dwmmac based tesla ethernet devices which support Gigabit
+ ethernet.
+
+allOf:
+ - $ref: snps,dwmac.yaml#
+
+properties:
+ compatible:
+ const: tesla,fsd-ethqos-4.21.yaml
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 5
+ maxItems: 10
+
+ clock-names:
+ minItems: 5
+ maxItems: 10
+ items:
+ - const: ptp_ref
+ - const: master_bus
+ - const: slave_bus
+ - const: tx
+ - const: rx
+ - const: master2_bus
+ - const: slave2_bus
+ - const: eqos_rxclk_mux
+ - const: eqos_phyrxclk
+ - const: dout_peric_rgmii_clk
+
+ fsd-rx-clock-skew:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: phandle to the syscon node
+ - description: offset of the control register
+ description:
+ Should be phandle/offset pair. The phandle to the syscon node.
+
+ iommus:
+ maxItems: 1
+
+ phy-mode:
+ $ref: ethernet-controller.yaml#/properties/phy-connection-type
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - rx-clock-skew
+ - iommus
+ - phy-mode
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/fsd-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ ethernet_1: ethernet@...00000 {
+ compatible = "tesla,dwc-qos-ethernet-4.21";
+ reg = <0x0 0x14300000 0x0 0x10000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I>,
+ <&clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK>,
+ <&clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK>,
+ <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>,
+ <&clock_peric PERIC_EQOS_PHYRXCLK>,
+ <&clock_peric PERIC_DOUT_RGMII_CLK>;
+ clock-names = "ptp_ref",
+ "master_bus",
+ "slave_bus",
+ "tx",
+ "rx",
+ "master2_bus",
+ "slave2_bus",
+ "eqos_rxclk_mux",
+ "eqos_phyrxclk",
+ "dout_peric_rgmii_clk";
+ pinctrl-names = "default";
+ pinctrl-0 = <ð1_tx_clk>, <ð1_tx_data>, <ð1_tx_ctrl>,
+ <ð1_phy_intr>, <ð1_rx_clk>, <ð1_rx_data>,
+ <ð1_rx_ctrl>, <ð1_mdio>;
+ fsd-rx-clock-skew = <&sysreg_peric 0x10>;
+ iommus = <&smmu_peric 0x0 0x1>;
+ phy-mode = "rgmii";
+ };
+
+...
--
2.17.1
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