linux-kernel - Re: [PATCH v5 2/6] perf arm64: Allow version comparisons of CPU IDs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d6b702fa-0b7b-63d4-cd84-eed4387663a7@oracle.com>
Date:   Tue, 15 Aug 2023 10:35:09 +0100
From:   John Garry <john.g.garry@...cle.com>
To:     James Clark <james.clark@....com>,
        linux-perf-users@...r.kernel.org, irogers@...gle.com,
        renyu.zj@...ux.alibaba.com
Cc:     Will Deacon <will@...nel.org>, Mike Leach <mike.leach@...aro.org>,
        Leo Yan <leo.yan@...aro.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Kan Liang <kan.liang@...ux.intel.com>,
        Nick Forrington <nick.forrington@....com>,
        Kajol Jain <kjain@...ux.ibm.com>,
        Eduard Zingerman <eddyz87@...il.com>,
        Sohom Datta <sohomdatta1@...il.com>,
        Rob Herring <robh@...nel.org>, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, coresight@...ts.linaro.org
Subject: Re: [PATCH v5 2/6] perf arm64: Allow version comparisons of CPU IDs

On 11/08/2023 15:39, James Clark wrote:
> Currently variant and revision fields are masked out of the MIDR so
> it's not possible to compare different versions of the same CPU.
> In a later commit a workaround will be removed just for N2 r0p3, so
> enable comparisons on version.
> 
> This has the side effect of changing the MIDR stored in the header of
> the perf.data file to no longer have masked version fields. It also
> affects the lookups in mapfile.csv, but as that currently only has
> zeroed version fields, it has no actual effect. The mapfile.csv
> documentation also states to zero the version fields, so unless this
> isn't done it will continue to have no effect.
> 

This looks ok apart from a couple of comments, below.

Thanks,
John

> Signed-off-by: James Clark <james.clark@....com>
> ---
>   tools/perf/arch/arm64/util/header.c | 64 ++++++++++++++++++++++-------
>   1 file changed, 50 insertions(+), 14 deletions(-)
> 
> diff --git a/tools/perf/arch/arm64/util/header.c b/tools/perf/arch/arm64/util/header.c
> index 80b9f6287fe2..8f74e801e1ab 100644
> --- a/tools/perf/arch/arm64/util/header.c
> +++ b/tools/perf/arch/arm64/util/header.c
> @@ -1,3 +1,6 @@
> +#include <linux/kernel.h>
> +#include <linux/bits.h>
> +#include <linux/bitfield.h>
>   #include <stdio.h>
>   #include <stdlib.h>
>   #include <perf/cpumap.h>
> @@ -10,14 +13,12 @@
>   
>   #define MIDR "/regs/identification/midr_el1"
>   #define MIDR_SIZE 19
> -#define MIDR_REVISION_MASK      0xf
> -#define MIDR_VARIANT_SHIFT      20
> -#define MIDR_VARIANT_MASK       (0xf << MIDR_VARIANT_SHIFT)
> +#define MIDR_REVISION_MASK      GENMASK(3, 0)
> +#define MIDR_VARIANT_MASK	GENMASK(23, 20)
>   
>   static int _get_cpuid(char *buf, size_t sz, struct perf_cpu_map *cpus)
>   {
>   	const char *sysfs = sysfs__mountpoint();
> -	u64 midr = 0;
>   	int cpu;
>   
>   	if (!sysfs || sz < MIDR_SIZE)
> @@ -44,21 +45,11 @@ static int _get_cpuid(char *buf, size_t sz, struct perf_cpu_map *cpus)
>   		}
>   		fclose(file);
>   
> -		/* Ignore/clear Variant[23:20] and
> -		 * Revision[3:0] of MIDR
> -		 */
> -		midr = strtoul(buf, NULL, 16);
> -		midr &= (~(MIDR_VARIANT_MASK | MIDR_REVISION_MASK));
> -		scnprintf(buf, MIDR_SIZE, "0x%016lx", midr);
>   		/* got midr break loop */
>   		break;
>   	}
>   
>   	perf_cpu_map__put(cpus);
> -
> -	if (!midr)
> -		return EINVAL;

Is there a reason to drop this check?

As I see, it is still checked in perf_pmu__getcpudid() -> 
get_cpuid_str() -> _get_cpuid(), and we don't zero the buf allocated in 
_get_cpuid()

> -
>   	return 0;
>   }
>   
> @@ -99,3 +90,48 @@ char *get_cpuid_str(struct perf_pmu *pmu)
>   
>   	return buf;
>   }
> +
> +/*
> + * Return 0 if idstr is a higher or equal to version of the same part as
> + * mapcpuid.

And what other values may be returned? If just 0/1, then can we have a 
bool return value?

> + *
> + * Therefore, if mapcpuid has 0 for revision and variant then any version of
> + * idstr will match as long as it's the same CPU type.
> + */
> +int strcmp_cpuid_str(const char *mapcpuid, const char *idstr)
> +{
> +	u64 map_id = strtoull(mapcpuid, NULL, 16);
> +	char map_id_variant = FIELD_GET(MIDR_VARIANT_MASK, map_id);
> +	char map_id_revision = FIELD_GET(MIDR_REVISION_MASK, map_id);
> +	u64 id = strtoull(idstr, NULL, 16);
> +	char id_variant = FIELD_GET(MIDR_VARIANT_MASK, id);
> +	char id_revision = FIELD_GET(MIDR_REVISION_MASK, id);
> +	u64 id_fields = ~(MIDR_VARIANT_MASK | MIDR_REVISION_MASK);
> +
> +	/* Compare without version first */
> +	if ((map_id & id_fields) != (id & id_fields))
> +		return 1;
> +
> +	/*
> +	 * ID matches, now compare version.
> +	 *
> +	 * Arm revisions (like r0p0) are compared here like two digit semver
> +	 * values eg. 1.3 < 2.0 < 2.1 < 2.2. The events json file with the
> +	 * highest matching version is used.
> +	 *
> +	 *  r = high value = 'Variant' field in MIDR
> +	 *  p = low value  = 'Revision' field in MIDR
> +	 *
> +	 */
> +	if (id_variant > map_id_variant)
> +		return 0;
> +
> +	if (id_variant == map_id_variant && id_revision >= map_id_revision)
> +		return 0;
> +
> +	/*
> +	 * variant is less than mapfile variant or variants are the same but
> +	 * the revision doesn't match. Return no match.
> +	 */
> +	return 1;
> +}