linux-kernel - Re: [PATCH] pinctrl: qcom: lpass-lpi: fix concurrent register updates

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Message-ID: <CACRpkdaBee108wbXcAcz5j7Ws1pbDw5TJ7id7dupJi64YHU0mQ@mail.gmail.com>
Date:   Tue, 15 Aug 2023 13:45:02 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Bjorn Andersson <andersson@...nel.org>,
        Andy Gross <agross@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
        linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH] pinctrl: qcom: lpass-lpi: fix concurrent register updates

On Tue, Aug 15, 2023 at 1:06 PM Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:

> The Qualcomm LPASS LPI pin controller driver uses one lock for guarding
> Read-Modify-Write code for slew rate registers.  However the pin
> configuration and muxing registers have exactly the same RMW code but
> are not protected.
>
> Pin controller framework does not provide locking here, thus it is
> possible to trigger simultaneous change of pin configuration registers
> resulting in non-atomic changes.
>
> Protect from concurrent access by re-using the same lock used to cover
> the slew rate register.  Using the same lock instead of adding second
> one will make more sense, once we add support for newer Qualcomm SoC,
> where slew rate is configured in the same register as pin
> configuration/muxing.
>
> Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
> Cc: <stable@...r.kernel.org>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

Reviewed-by: Linus Walleij <linus.walleij@...aro.org>

Here it would be nice if we took a sweep once this fix is in and switch
over to scoped guards, like Bartosz does:
https://lore.kernel.org/linux-gpio/20230812183635.5478-1-brgl@bgdev.pl/

Yours,
Linus Walleij