linux-kernel - Re: [PATCH v2] perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09

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Message-Id: <169210025390.538323.7942274665229323750.b4-ty@kernel.org>
Date:   Tue, 15 Aug 2023 15:10:50 +0100
From:   Will Deacon <will@...nel.org>
To:     linux-arm-kernel@...ts.infradead.org, linux-doc@...r.kernel.org,
        robin.murphy@....com, linux-acpi@...r.kernel.org,
        lpieralisi@...nel.org, guohanjun@...wei.com, mark.rutland@....com,
        rafael@...nel.org, corbet@....net,
        Yicong Yang <yangyicong@...wei.com>, catalin.marinas@....com
Cc:     kernel-team@...roid.com, Will Deacon <will@...nel.org>,
        yangyicong@...ilicon.com, jonathan.cameron@...wei.com,
        zhurui3@...wei.com, hejunhao3@...wei.com,
        linux-kernel@...r.kernel.org, prime.zeng@...ilicon.com,
        shameerali.kolothum.thodi@...wei.com, linuxarm@...wei.com
Subject: Re: [PATCH v2] perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09

On Mon, 14 Aug 2023 20:40:12 +0800, Yicong Yang wrote:
> From: Yicong Yang <yangyicong@...ilicon.com>
> 
> Some HiSilicon SMMU PMCG suffers the erratum 162001900 that the PMU
> disable control sometimes fail to disable the counters. This will lead
> to error or inaccurate data since before we enable the counters the
> counter's still counting for the event used in last perf session.
> 
> [...]

Applied to will (for-next/perf), thanks!

[1/1] perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09
      https://git.kernel.org/will/c/0242737dc4eb

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev