linux-kernel - [PATCH v3 1/3] riscv: dma-mapping: only invalidate after DMA, not flush

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Message-Id: <20230816232336.164413-2-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date:   Thu, 17 Aug 2023 00:23:34 +0100
From:   Prabhakar <prabhakar.csengg@...il.com>
To:     Arnd Bergmann <arnd@...db.de>, Christoph Hellwig <hch@....de>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Conor Dooley <conor.dooley@...rochip.com>,
        Anup Patel <apatel@...tanamicro.com>,
        Andrew Jones <ajones@...tanamicro.com>,
        Jisheng Zhang <jszhang@...nel.org>,
        linux-kernel@...r.kernel.org
Cc:     Geert Uytterhoeven <geert+renesas@...der.be>,
        Samuel Holland <samuel@...lland.org>,
        linux-riscv@...ts.infradead.org, linux-renesas-soc@...r.kernel.org,
        Prabhakar <prabhakar.csengg@...il.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        Palmer Dabbelt <palmer@...osinc.com>
Subject: [PATCH v3 1/3] riscv: dma-mapping: only invalidate after DMA, not flush

From: Arnd Bergmann <arnd@...db.de>

No other architecture intentionally writes back dirty cache lines into
a buffer that a device has just finished writing into. If the cache is
clean, this has no effect at all, but if a cacheline in the buffer has
actually been written by the CPU,  there is a driver bug that is likely
made worse by overwriting that buffer.

Signed-off-by: Arnd Bergmann <arnd@...db.de>
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Acked-by: Palmer Dabbelt <palmer@...osinc.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
---
v2->v3
* No change

v1->v2
* Fixed typo drive->driver in commit message
* Included RB and ACKs
---
 arch/riscv/mm/dma-noncoherent.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c
index d51a75864e53..94614cf61cdd 100644
--- a/arch/riscv/mm/dma-noncoherent.c
+++ b/arch/riscv/mm/dma-noncoherent.c
@@ -42,7 +42,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
 		break;
 	case DMA_FROM_DEVICE:
 	case DMA_BIDIRECTIONAL:
-		ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size);
+		ALT_CMO_OP(inval, vaddr, size, riscv_cbom_block_size);
 		break;
 	default:
 		break;
-- 
2.34.1