linux-kernel - Re: [PATCH v5 5/6] perf vendor events arm64: Update stall

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <02706043-3c81-324d-60a6-ce71a20dfe31@arm.com>
Date:   Wed, 16 Aug 2023 10:16:15 +0100
From:   James Clark <james.clark@....com>
To:     John Garry <john.g.garry@...cle.com>,
        linux-perf-users@...r.kernel.org, irogers@...gle.com,
        renyu.zj@...ux.alibaba.com
Cc:     Will Deacon <will@...nel.org>, Mike Leach <mike.leach@...aro.org>,
        Leo Yan <leo.yan@...aro.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Kan Liang <kan.liang@...ux.intel.com>,
        Kajol Jain <kjain@...ux.ibm.com>,
        Nick Forrington <nick.forrington@....com>,
        Eduard Zingerman <eddyz87@...il.com>,
        Sohom Datta <sohomdatta1@...il.com>,
        Rob Herring <robh@...nel.org>, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, coresight@...ts.linaro.org
Subject: Re: [PATCH v5 5/6] perf vendor events arm64: Update stall_slot
 workaround for N2 r0p3



On 15/08/2023 10:40, John Garry wrote:
> On 11/08/2023 15:39, James Clark wrote:
>> N2 r0p3 doesn't require the workaround [1], so gating on (#slots - 5) no
>> longer works because all N2s have 5 slots. Add a new expression builtin
>> that allows calling strcmp_cpuid_str() and comparing CPUIDs in metric
>> formulas.
>>
>> In this case, the commented formula looks like this:
>>
>>    strcmp_cpuid_str(0x410fd493)        # greater than or equal to N2 r0p3
>>    | strcmp_cpuid_str(0x410fd490) ^ 1  # OR NOT any version of N2
>>
>> [1]:https://urldefense.com/v3/__https://gitlab.arm.com/telemetry-solution/telemetry-solution/-/blob/main/data/pmu/cpu/neoverse/neoverse-n2-r0p3.json__;!!ACWV5N9M2RV99hQ!MaXDALyhn3HmfLdPUZRKTItKxg73C-qP4aTNAAdFwzjW5cFEBTHtD-VyqBzUTFbXMvABB-daDD01AfI7um_BtA$  Signed-off-by: James Clark<james.clark@....com>
>> ---
>>   tools/perf/arch/arm64/util/pmu.c               | 18 +-----------------
>>   .../arch/arm64/arm/neoverse-n2-v2/metrics.json |  8 ++++----
>>   tools/perf/pmu-events/metric.py                | 17 +++++++++++++++--
>>   tools/perf/util/expr.c                         | 18 ++++++++++++++++++
>>   tools/perf/util/expr.h                         |  1 +
>>   tools/perf/util/expr.l                         |  1 +
>>   tools/perf/util/expr.y                         |  8 +++++++-
>>   tools/perf/util/pmu.c                          | 17 +++++++++++++++++
>>   tools/perf/util/pmu.h                          |  1 +
>>   9 files changed, 65 insertions(+), 24 deletions(-)
> 
> This patch looks ok, but I think that it would be better to separate out
> the metrics.json change into a separate patch.
> 
Yep I thought about doing that, I can change it in the next version.

> Thanks,
> John