linux-kernel - Re: [PATCH] mmc: sdhci-esdhc-imx: improve ESDHC_FLAG

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Message-ID: <CAPDyKForXMxANUrvOUfEtiRsXYPJ8MbfPBdJB6zu49QfeJfS8A@mail.gmail.com>
Date:   Wed, 16 Aug 2023 11:52:10 +0200
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Giulio Benetti <giulio.benetti@...ettiengineering.com>
Cc:     Haibo Chen <haibo.chen@....com>, Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        linux-mmc@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, Jim Reinhart <jimr@...vox.com>,
        James Autry <jautry@...vox.com>,
        Matthew Maron <matthewm@...vox.com>
Subject: Re: [PATCH] mmc: sdhci-esdhc-imx: improve ESDHC_FLAG_ERR010450

On Fri, 11 Aug 2023 at 23:49, Giulio Benetti
<giulio.benetti@...ettiengineering.com> wrote:
>
> Errata ERR010450 only shows up if voltage is 1.8V, but if the device is
> supplied by 3v3 the errata can be ignored. So let's check for if quirk
> SDHCI_QUIRK2_NO_1_8_V is defined or not before limiting the frequency.
>
> Sponsored by: Tekvox Inc.

Didn't know we have this kind of tag. Can you point me to the
documentation of it?

> Cc: Jim Reinhart <jimr@...vox.com>
> Cc: James Autry <jautry@...vox.com>
> Cc: Matthew Maron <matthewm@...vox.com>
> Signed-off-by: Giulio Benetti <giulio.benetti@...ettiengineering.com>

Kind regards
Uffe

> ---
>  drivers/mmc/host/sdhci-esdhc-imx.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
> index eebf94604a7f..cddecc1e1ac2 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -171,8 +171,8 @@
>  #define ESDHC_FLAG_HS400               BIT(9)
>  /*
>   * The IP has errata ERR010450
> - * uSDHC: Due to the I/O timing limit, for SDR mode, SD card clock can't
> - * exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
> + * uSDHC: At 1.8V due to the I/O timing limit, for SDR mode, SD card
> + * clock can't exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
>   */
>  #define ESDHC_FLAG_ERR010450           BIT(10)
>  /* The IP supports HS400ES mode */
> @@ -961,7 +961,8 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,
>                 | ESDHC_CLOCK_MASK);
>         sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
>
> -       if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
> +       if ((imx_data->socdata->flags & ESDHC_FLAG_ERR010450) &&
> +           (!(host->quirks2 & SDHCI_QUIRK2_NO_1_8_V))) {
>                 unsigned int max_clock;
>
>                 max_clock = imx_data->is_ddr ? 45000000 : 150000000;
> --
> 2.34.1
>