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Message-ID: <20230816104245.2676965-2-hsinyi@chromium.org>
Date: Wed, 16 Aug 2023 18:38:33 +0800
From: Hsin-Yi Wang <hsinyi@...omium.org>
To: Tudor Ambarus <tudor.ambarus@...aro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Bjorn Andersson <andersson@...nel.org>
Cc: Pratyush Yadav <pratyush@...nel.org>,
Michael Walle <michael@...le.cc>,
"Miquel Raynal )" <miquel.raynal@...tlin.com>,
"Richard Weinberger )" <richard@....at>,
"Vignesh Raghavendra )" <vigneshr@...com>,
Rob Herring <robh+dt@...nel.org>,
linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
cros-qcom-dts-watchers@...omium.org,
Andy Gross <agross@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: [PATCH v2,2/2] arm64: dts: mediatek: mt8183: set bus rx width to disable quad mode
Some of the SKUs are using gigadevice gd25lq64c flash chip. The chip
default enables quad mode, which results in the write protect pin set to
IO pin. In mt8183 kukui, we won't use quad enable for all SKUs, so apply
the property to disable spi nor's quad mode.
Signed-off-by: Hsin-Yi Wang <hsinyi@...omium.org>
---
arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
index 6ce16a265e053..ef472b522f2e7 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
@@ -877,6 +877,7 @@ w25q64dw: flash@0 {
compatible = "winbond,w25q64dw", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
+ spi-rx-bus-width = <2>;
};
};
--
2.41.0.694.ge786442a9b-goog
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