linux-kernel - Re: [PATCH] perf: ARM_SMMU_V3_PMU should depend on ARM_SMMU

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <2e076cb5-1e31-10b2-9f33-79a825ac9c11@arm.com>
Date:   Wed, 16 Aug 2023 12:23:30 +0100
From:   Robin Murphy <robin.murphy@....com>
To:     Geert Uytterhoeven <geert+renesas@...der.be>,
        Will Deacon <will@...nel.org>,
        Mark Rutland <mark.rutland@....com>
Cc:     Jean-Philippe Brucker <jean-philippe@...aro.org>,
        Vincent Whitchurch <vincent.whitchurch@...s.com>,
        Joerg Roedel <joro@...tes.org>,
        linux-arm-kernel@...ts.infradead.org, iommu@...ts.linux.dev,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] perf: ARM_SMMU_V3_PMU should depend on ARM_SMMU_V3

On 2023-08-15 16:36, Geert Uytterhoeven wrote:
> There is no point in monitoring transactions passing through the SMMU
> when ARM Ltd. System MMU Version 3 (SMMUv3) Support is disabled.
> Hence replace the dependency on ARM64 by a dependency on ARM_SMMU_V3
> (which implies the former).
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
> ---
> This caught my eye after commit 7c3f204e544dfa37 ("perf/smmuv3: Remove
> build dependency on ACPI") in arm64/for-next/core.
> 
> Perhaps my understanding is wrong? Is there anything to monitor when
> ARM_SMMU_V3=n?

Yes, at least TBU event 1 still counts bypass transactions even when the 
SMMU is disabled, so PMCGs can be useful as basic traffic monitors in 
their own right. Plus the original design intent was that PMCGs may also 
be implemented by other things that interact with the SMMU, like 
ATS-capable PCIe root complexes, or devices with their own internal 
TLBs, thus they could potentially count any manner of 
implementation-defined events that aren't necessarily related to SMMU 
translation.

Thanks,
Robin.

>   drivers/perf/Kconfig | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig
> index 273d67ecf6d2530f..c33324692fbf0141 100644
> --- a/drivers/perf/Kconfig
> +++ b/drivers/perf/Kconfig
> @@ -92,7 +92,7 @@ config ARM_PMU_ACPI
>   
>   config ARM_SMMU_V3_PMU
>   	 tristate "ARM SMMUv3 Performance Monitors Extension"
> -	 depends on ARM64 || (COMPILE_TEST && 64BIT)
> +	 depends on ARM_SMMU_V3 || (COMPILE_TEST && 64BIT)
>   	 depends on GENERIC_MSI_IRQ
>   	   help
>   	   Provides support for the ARM SMMUv3 Performance Monitor Counter