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Message-ID: <ffd5401b-400b-79e2-51f2-e6866251000f@amd.com>
Date: Wed, 16 Aug 2023 18:48:35 +0530
From: Sanath S <sanaths2@....com>
To: bhelgaas@...gle.com, linux-pci@...r.kernel.org,
Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org, mario.limonciello@....com,
Sanjay R Mehta <sanju.mehta@....com>
Subject: Re: [PATCH] PCI: Allocate maximum available buses to help extending
the daisy chain
Adding Mika.
On 8/16/2023 10:49 AM, Sanath S wrote:
> In the case of Thunderbolt, it contains a PCIe switch and one or
> more hotplug-capable PCIe downstream ports where the daisy chain
> can be extended.
>
> Currently when a Thunderbolt Dock is plugged in during S5/Reboot,
> System BIOS allocates a very minimal number of buses for bridges and
> hot-plug capable PCIe downstream ports to enumerate the dock during
> boot. Because of this, we run out of bus space pretty quickly when
> more PCIe devices are attached to hotplug downstream ports in order
> to extend the chain.
>
> Before:
> +-04.0
> +-04.1-[63-c1]----00.0-[64-69]--+-00.0-[65]--
> | +-01.0-[66]--
> | +-02.0-[67]--
> | +-03.0-[68]--
> | \-04.0-[69]--
> +-08.0
>
> In case of a thunderbolt capable bridge, reconfigure the buses allocated
> by BIOS to the maximum available buses. So that the hot-plug bridges gets
> maximum buses and chain can be extended to accommodate more PCIe devices.
> This fix is necessary for all the PCIe downstream ports where the daisy
> chain can be extended.
>
> After:
> +-04.0
> +-04.1-[63-c1]----00.0-[64-c1]--+-00.0-[65]--
> | +-01.0-[66-84]--
> | +-02.0-[85-a3]--
> | +-03.0-[a4-c0]--
> | \-04.0-[c1]--
> +-08.0
>
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=216000
> Signed-off-by: Sanjay R Mehta <sanju.mehta@....com>
> Signed-off-by: Sanath S <Sanath.S@....com>
> ---
> drivers/pci/probe.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index 8bac3ce02609..ab7e90ef2382 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -1263,6 +1263,8 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev,
> bool fixed_buses;
> u8 fixed_sec, fixed_sub;
> int next_busnr;
> + int start = bus->busn_res.start;
> + int end = bus->busn_res.end;
>
> /*
> * Make sure the bridge is powered on to be able to access config
> @@ -1292,6 +1294,13 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev,
> broken = 1;
> }
>
> + /* Reconfigure, If maximum buses are not allocated */
> + if (!pass && start != 0 && end != 0xff && subordinate != end) {
> + pci_info(dev, "Bridge has subordinate 0x%x but max busn 0x%x, reconfiguring\n",
> + subordinate, end);
> + broken = 1;
> + }
> +
> /*
> * Disable Master-Abort Mode during probing to avoid reporting of
> * bus errors in some architectures.
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