linux-kernel - Re: [PATCH v2 2/3] arm64: dts: qcom: sm8450: Add opp table support to PCIe

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Message-ID: <CAA8EJpoi0BkuQZef=v3JxB-axXe+jB0bEWCmsk1ZJYiaWiuevw@mail.gmail.com>
Date:   Wed, 16 Aug 2023 16:40:28 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Krishna chaitanya chundru <quic_krichai@...cinc.com>
Cc:     manivannan.sadhasivam@...aro.org, helgaas@...nel.org,
        linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org, quic_vbadigan@...cinc.com,
        quic_nitegupt@...cinc.com, quic_skananth@...cinc.com,
        quic_ramkri@...cinc.com, quic_parass@...cinc.com,
        krzysztof.kozlowski@...aro.org, Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>
Subject: Re: [PATCH v2 2/3] arm64: dts: qcom: sm8450: Add opp table support to PCIe

On Wed, 16 Aug 2023 at 16:25, Krishna chaitanya chundru
<quic_krichai@...cinc.com> wrote:
>
> PCIe needs to choose the appropriate performance state of RPMH power
> domain based upon the PCIe gen speed.
>
> So let's add the OPP table support to specify RPMH performance states.
>
> Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sm8450.dtsi | 47 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 47 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 595533a..c77a683 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -1803,7 +1803,28 @@
>                         pinctrl-names = "default";
>                         pinctrl-0 = <&pcie0_default_state>;
>
> +                       operating-points-v2 = <&pcie0_opp_table>;
> +
>                         status = "disabled";
> +
> +                       pcie0_opp_table: opp-table {
> +                               compatible = "operating-points-v2";
> +
> +                               opp-2500000 {

As a random suggestion: these frequencies are calculated by the
driver. It might be easier to use opp-level for the PCIe generation
instead.

This way this OPP entry can become:

opp-1 {
    opp-level = <1>;
    required-opps = <&rpmhpd_opp_low_svs>;
};

> +                                       opp-hz = /bits/ 64 <2500000>;
> +                                       required-opps = <&rpmhpd_opp_low_svs>;
> +                               };
> +
> +                               opp-5000000 {
> +                                       opp-hz = /bits/ 64 <5000000>;
> +                                       required-opps = <&rpmhpd_opp_low_svs>;
> +                               };
> +
> +                               opp-8000000 {
> +                                       opp-hz = /bits/ 64 <8000000>;
> +                                       required-opps = <&rpmhpd_opp_nom>;
> +                               };
> +                       };
>                 };
>
>                 pcie0_phy: phy@...6000 {
> @@ -1915,7 +1936,33 @@
>                         pinctrl-names = "default";
>                         pinctrl-0 = <&pcie1_default_state>;
>
> +                       operating-points-v2 = <&pcie1_opp_table>;
> +
>                         status = "disabled";
> +
> +                       pcie1_opp_table: opp-table {
> +                               compatible = "operating-points-v2";
> +
> +                               opp-2500000 {
> +                                       opp-hz = /bits/ 64 <2500000>;
> +                                       required-opps = <&rpmhpd_opp_low_svs>;
> +                               };
> +
> +                               opp-5000000 {
> +                                       opp-hz = /bits/ 64 <5000000>;
> +                                       required-opps = <&rpmhpd_opp_low_svs>;
> +                               };
> +
> +                               opp-8000000 {
> +                                       opp-hz = /bits/ 64 <8000000>;
> +                                       required-opps = <&rpmhpd_opp_low_svs>;
> +                               };
> +
> +                               opp-16000000 {
> +                                       opp-hz = /bits/ 64 <16000000>;
> +                                       required-opps = <&rpmhpd_opp_nom>;
> +                               };
> +                       };
>                 };
>
>                 pcie1_phy: phy@...f000 {
> --
> 2.7.4
>


-- 
With best wishes
Dmitry