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Message-ID: <2cb498f637e082a4af8032311fad3cae84d6aa5d.1692199324.git.christophe.leroy@csgroup.eu>
Date: Wed, 16 Aug 2023 17:22:16 +0200
From: Christophe Leroy <christophe.leroy@...roup.eu>
To: Michael Ellerman <mpe@...erman.id.au>,
Nicholas Piggin <npiggin@...il.com>
Cc: Christophe Leroy <christophe.leroy@...roup.eu>,
linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: [PATCH 1/2] powerpc/83xx: Fix style problems in usb.c and remove unneccessary includes from mpc83xx.h
Replace printk(KERN_WARN with pr_warn(
Remove a couple of blank lines
Re-align multi-line code.
Replace asm/io.h by linux/io.h
mpc83xx.h doesn't need linux/device.h or asm/pci-bridge.h
Signed-off-by: Christophe Leroy <christophe.leroy@...roup.eu>
---
arch/powerpc/platforms/83xx/mpc83xx.h | 2 --
arch/powerpc/platforms/83xx/usb.c | 35 ++++++++++++---------------
2 files changed, 15 insertions(+), 22 deletions(-)
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index aea803ba3a15..0b8738a2b980 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -3,8 +3,6 @@
#define __MPC83XX_H__
#include <linux/init.h>
-#include <linux/device.h>
-#include <asm/pci-bridge.h>
/* System Clock Control Register */
#define MPC83XX_SCCR_OFFS 0xA08
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index e2a13a052f96..d5ad6cff9bd8 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -6,19 +6,17 @@
* Author: Li Yang
*/
-
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/of.h>
#include <linux/of_address.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <sysdev/fsl_soc.h>
#include "mpc83xx.h"
-
#ifdef CONFIG_PPC_MPC834x
int __init mpc834x_usb_cfg(void)
{
@@ -44,8 +42,8 @@ int __init mpc834x_usb_cfg(void)
prop = of_get_property(np, "phy_type", NULL);
port1_is_dr = 1;
- if (prop && (!strcmp(prop, "utmi") ||
- !strcmp(prop, "utmi_wide"))) {
+ if (prop &&
+ (!strcmp(prop, "utmi") || !strcmp(prop, "utmi_wide"))) {
sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;
sicrh |= MPC834X_SICRH_USB_UTMI;
port0_is_dr = 1;
@@ -60,7 +58,7 @@ int __init mpc834x_usb_cfg(void)
} else if (prop && !strcmp(prop, "ulpi")) {
sicrl |= MPC834X_SICRL_USB1;
} else {
- printk(KERN_WARNING "834x USB PHY type not supported\n");
+ pr_warn("834x USB PHY type not supported\n");
}
of_node_put(np);
}
@@ -71,15 +69,13 @@ int __init mpc834x_usb_cfg(void)
prop = of_get_property(np, "port0", NULL);
if (prop) {
if (port0_is_dr)
- printk(KERN_WARNING
- "834x USB port0 can't be used by both DR and MPH!\n");
+ pr_warn("834x USB port0 can't be used by both DR and MPH!\n");
sicrl &= ~MPC834X_SICRL_USB0;
}
prop = of_get_property(np, "port1", NULL);
if (prop) {
if (port1_is_dr)
- printk(KERN_WARNING
- "834x USB port1 can't be used by both DR and MPH!\n");
+ pr_warn("834x USB port1 can't be used by both DR and MPH!\n");
sicrl &= ~MPC834X_SICRL_USB1;
}
of_node_put(np);
@@ -124,14 +120,14 @@ int __init mpc831x_usb_cfg(void)
/* Configure clock */
immr_node = of_get_parent(np);
if (immr_node && (of_device_is_compatible(immr_node, "fsl,mpc8315-immr") ||
- of_device_is_compatible(immr_node, "fsl,mpc8308-immr")))
+ of_device_is_compatible(immr_node, "fsl,mpc8308-immr")))
clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
- MPC8315_SCCR_USB_MASK,
- MPC8315_SCCR_USB_DRCM_01);
+ MPC8315_SCCR_USB_MASK,
+ MPC8315_SCCR_USB_DRCM_01);
else
clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
- MPC83XX_SCCR_USB_MASK,
- MPC83XX_SCCR_USB_DRCM_11);
+ MPC83XX_SCCR_USB_MASK,
+ MPC83XX_SCCR_USB_DRCM_11);
/* Configure pin mux for ULPI. There is no pin mux for UTMI */
if (prop && !strcmp(prop, "ulpi")) {
@@ -169,8 +165,7 @@ int __init mpc831x_usb_cfg(void)
usb_regs = ioremap(res.start, resource_size(&res));
/* Using on-chip PHY */
- if (prop && (!strcmp(prop, "utmi_wide") ||
- !strcmp(prop, "utmi"))) {
+ if (prop && (!strcmp(prop, "utmi_wide") || !strcmp(prop, "utmi"))) {
u32 refsel;
if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr"))
@@ -182,7 +177,7 @@ int __init mpc831x_usb_cfg(void)
refsel = CONTROL_REFSEL_48MHZ;
/* Set UTMI_PHY_EN and REFSEL */
out_be32(usb_regs + FSL_USB2_CONTROL_OFFS,
- CONTROL_UTMI_PHY_EN | refsel);
+ CONTROL_UTMI_PHY_EN | refsel);
/* Using external UPLI PHY */
} else if (prop && !strcmp(prop, "ulpi")) {
/* Set PHY_CLK_SEL to ULPI */
@@ -197,7 +192,7 @@ int __init mpc831x_usb_cfg(void)
#endif /* CONFIG_USB_OTG */
out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, temp);
} else {
- printk(KERN_WARNING "831x USB PHY type not supported\n");
+ pr_warn("831x USB PHY type not supported\n");
ret = -EINVAL;
}
@@ -224,7 +219,7 @@ int __init mpc837x_usb_cfg(void)
prop = of_get_property(np, "phy_type", NULL);
if (!prop || (strcmp(prop, "ulpi") && strcmp(prop, "serial"))) {
- printk(KERN_WARNING "837x USB PHY type not supported\n");
+ pr_warn("837x USB PHY type not supported\n");
of_node_put(np);
return -EINVAL;
}
--
2.41.0
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