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Message-ID: <87cyzmghjq.ffs@tglx>
Date: Thu, 17 Aug 2023 11:11:05 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: "Zhang, Rui" <rui.zhang@...el.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Cc: "Zhuo, Qiuxu" <qiuxu.zhuo@...el.com>,
"Gross, Jurgen" <jgross@...e.com>,
"mikelley@...rosoft.com" <mikelley@...rosoft.com>,
"arjan@...ux.intel.com" <arjan@...ux.intel.com>,
"x86@...nel.org" <x86@...nel.org>,
"thomas.lendacky@....com" <thomas.lendacky@....com>,
"ray.huang@....com" <ray.huang@....com>,
"andrew.cooper3@...rix.com" <andrew.cooper3@...rix.com>,
"Sivanich, Dimitri" <dimitri.sivanich@....com>,
"wei.liu@...nel.org" <wei.liu@...nel.org>,
"puwen@...on.cn" <puwen@...on.cn>,
"Mehta, Sohil" <sohil.mehta@...el.com>
Subject: Re: [patch V4 28/41] x86/cpu: Provide a sane leaf 0xb/0x1f parser
On Wed, Aug 16 2023 at 12:09, Rui Zhang wrote:
>> + } else if (tscan->c->topo.initial_apicid != sl.x2apic_id) {
>> + pr_warn_once(FW_BUG "CPUID leaf 0x%x subleaf %d APIC
>> ID mismatch %x != %x\n",
>> + leaf, subleaf, tscan->c-
>> >topo.initial_apicid, sl.x2apic_id);
>> + }
>> +
>
> Maybe worth a warning somewhere if sl.x2apic_shift !=
> x86_topo_system.dom_shifts[dom], because invariant x2apic_shift (for
> the same level) among different CPUs is critical for this patch series.
> And I do see variant x2apic_shift on an Intel AlderLake NUC, which has
> been identified to be a microcode bug later.
Yes, we can do that.
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