linux-kernel - Re: [PATCH net-next v5 6/9] dt-bindings: net: snps,dwmac: add safety irq support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <wkzy3v272ia237pfhlvtrwbij7qeswb2zmkxhnsir5xtroezr7@frow2mvqeq35>
Date:   Fri, 18 Aug 2023 20:39:56 +0300
From:   Serge Semin <fancer.lancer@...il.com>
To:     Jisheng Zhang <jszhang@...nel.org>
Cc:     "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Jose Abreu <joabreu@...opsys.com>, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH net-next v5 6/9] dt-bindings: net: snps,dwmac: add safety
 irq support

On Fri, Aug 18, 2023 at 12:57:46AM +0800, Jisheng Zhang wrote:
> The snps dwmac IP support safety features, and those Safety Feature
> Correctible Error and Uncorrectible Error irqs may be separate irqs.
> 
> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> ---
>  .../devicetree/bindings/net/snps,dwmac.yaml         | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> index ddf9522a5dc2..ee9174f77d97 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> @@ -103,17 +103,26 @@ properties:
>  
>    interrupts:
>      minItems: 1
> +    maxItems: 5
> +    additionalItems: true
>      items:
>        - description: Combined signal for various interrupt events
>        - description: The interrupt to manage the remote wake-up packet detection
>        - description: The interrupt that occurs when Rx exits the LPI state
> +      - description: The interrupt that occurs when Safety Feature Correctible Errors happen
> +      - description: The interrupt that occurs when Safety Feature Uncorrectible Errors happen
>  
>    interrupt-names:
>      minItems: 1
> +    maxItems: 5
> +    additionalItems: true
>      items:
>        - const: macirq
> -      - enum: [eth_wake_irq, eth_lpi]
> -      - const: eth_lpi
> +      - enum:
> +          - eth_wake_irq
> +          - eth_lpi
> +          - sfty_ce
> +          - sfty_ue

IIUC this would mean the next constraints:
Item    0: must be macirq,
Item    1: any of eth_wake_irq, eth_lpi, sfty_ce, sfty_ue
Items 2:4: any bla-bla-bla.

After adding the per-DMA-channel IRQs in the next patches the array
will be extended to up to 37 any names. It doesn't look correct. What
about converting it to the position independent arrays constraint:

  interrupts:
    minItems: 1
    maxItems: 34

    
  interrupt-names:
    minItems: 1
    maxItems: 34
    items:
      oneOf:
        - description: Combined signal for various interrupt events
          const: macirq
        - description: The interrupt to manage the remote wake-up packet detection
          const: eth_wake_irq
        - description: The interrupt that occurs when Rx exits the LPI state
          const: eth_lpi
        - description: Safety Feature Correctible Errors interrupt
          const: sfty_ce
        - description: Safety Feature Uncorrectible Errors interrupt
          const: sfty_ue
        - description: DMA Tx per-channel interrupt
          pattern: '^dma_tx([0-9]|1[0-5])?$'
        - description: DMA Rx per-channel interrupt
          pattern: '^dma_rx([0-9]|1[0-1])?$'

    allOf:
      - contains:
          const: macirq

Hope neither Krzysztof nor Rob will be against such modification
especially seeing it's the only way to resolve the very much possible
case of a device having macirq and per-DMA-channel IRQs but lacking
the LPI, PMT or Safety IRQs.

Note 1. I've changed the name of the Tx/Rx IRQs to having the "dma_"
suffix to signify that these are actually DMA-channel IRQs. The MTL
queue interrupts drive the sbd_intr_o signal which is tracked by the
"macirq" line.

Note 2. I've reduced the number of DMA Rx IRQs to being up to 12 in
accordance with available to me DW XGMAC HW manual.

-Serge(y)

>  
>    clocks:
>      minItems: 1
> -- 
> 2.40.1
> 
>