[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20230818184901.GC22185@unreal>
Date: Fri, 18 Aug 2023 21:49:01 +0300
From: Leon Romanovsky <leon@...nel.org>
To: Sai Krishna <saikrishnag@...vell.com>
Cc: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
pabeni@...hat.com, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, sgoutham@...vell.com,
gakula@...vell.com, sbhatta@...vell.com, hkelam@...vell.com,
richardcochran@...il.com, kalesh-anakkur.purayil@...adcom.com,
Naveen Mamindlapalli <naveenm@...vell.com>
Subject: Re: [net-next PATCH v3] octeontx2-pf: Use PTP HW timestamp counter
atomic update feature
On Thu, Aug 17, 2023 at 11:13:51PM +0530, Sai Krishna wrote:
> Some of the newer silicon versions in CN10K series supports a feature
> where in the current PTP timestamp in HW can be updated atomically
> without losing any cpu cycles unlike read/modify/write register.
> This patch uses this feature so that PTP accuracy can be improved
> while adjusting the master offset in HW. There is no need for SW
> timecounter when using this feature. So removed references to SW
> timecounter wherever appropriate.
>
> Signed-off-by: Sai Krishna <saikrishnag@...vell.com>
> Signed-off-by: Naveen Mamindlapalli <naveenm@...vell.com>
> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@...vell.com>
> Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@...adcom.com>
> ---
> v3:
> - Addressed review comments given by Jakub Kicinski
> 1. Fixed re-ordering of headers in alphabetical order
> 2. Refactored SoC revision identification logic
> 3. CN10K errata revisions can be different from atomic update
> supported revision devices.
> 4. Removed ptp device check.
> v2:
> - Addressed review comments given by Simon Horman, Kalesh Anakkur Purayil
> 1. Removed inline keyword for function in .c file
> 2. Modified/optimized conditions related boolean
>
> .../net/ethernet/marvell/octeontx2/af/mbox.h | 12 ++
> .../net/ethernet/marvell/octeontx2/af/ptp.c | 155 ++++++++++++++--
> .../net/ethernet/marvell/octeontx2/af/ptp.h | 3 +-
> .../net/ethernet/marvell/octeontx2/af/rvu.c | 2 +-
> .../net/ethernet/marvell/octeontx2/af/rvu.h | 12 ++
> .../marvell/octeontx2/nic/otx2_common.h | 1 +
> .../ethernet/marvell/octeontx2/nic/otx2_ptp.c | 174 ++++++++++++++----
> 7 files changed, 304 insertions(+), 55 deletions(-)
<...>
> +static bool is_tstmp_atomic_update_supported(struct otx2_ptp *ptp)
> +{
> + struct ptp_get_cap_rsp *rsp;
> + struct msg_req *req;
> + int err;
> +
> + if (!ptp->nic)
> + return false;
> +
> + mutex_lock(&ptp->nic->mbox.lock);
> + req = otx2_mbox_alloc_msg_ptp_get_cap(&ptp->nic->mbox);
> + if (!req)
> + return false;
> +
> + err = otx2_sync_mbox_msg(&ptp->nic->mbox);
> + if (err)
> + return false;
Shouldn't you call to mutex_unlock() in two returns above?
Thanks
> +
> + rsp = (struct ptp_get_cap_rsp *)otx2_mbox_get_rsp(&ptp->nic->mbox.mbox, 0,
> + &req->hdr);
> + mutex_unlock(&ptp->nic->mbox.lock);
> +
> + if (IS_ERR(rsp))
> + return false;
> +
> + if (rsp->cap & PTP_CAP_HW_ATOMIC_UPDATE)
> + return true;
> +
> + return false;
> +}
Powered by blists - more mailing lists