linux-kernel - [PATCH] cpufreq: mediatek: change transition delay for MT8186

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Message-ID: <20230818020616.4748-1-chun-jen.tseng@mediatek.com>
Date:   Fri, 18 Aug 2023 10:06:16 +0800
From:   Mark Tseng <chun-jen.tseng@...iatek.com>
To:     <rafael@...nel.org>, <viresh.kumar@...aro.org>,
        <matthias.bgg@...il.com>,
        <angelogioacchino.delregno@...labora.com>, <sumitg@...dia.com>,
        <sanjayc@...dia.com>
CC:     <rafael.j.wysocki@...el.com>, <linux-pm@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        <chun-jen.tseng@...iatek.com>
Subject: [PATCH] cpufreq: mediatek: change transition delay for MT8186

For MT8186, it has policy0 and policy6 by different governor thread,so
it may be call cpufreq->set_target_index() by different core. In general
case, it must check BCPU, LCPU and CCI together then take about 10ms.

Atfer 44295af5019f this patch, it may call cpufreq_out_of_sync() by
cpufreq_verify_current_freq() because current frequency is bigger
than clk_get_rate() ouver 1Mh. By the same time, it may call
cpufreq->set_target_index() again. So, the CCI freq may be too lower for
BCPU cause BCPU kernel panic.

So, it should change the default transition delay 1ms to 10ms. It can
promise the next freq setting then governor trigger new freq change.

Fixes: 44295af5019f ("cpufreq: use correct unit when verify cur freq")
Signed-off-by: Mark Tseng <chun-jen.tseng@...iatek.com>
---
 drivers/cpufreq/mediatek-cpufreq.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
index a0a61919bc4c..5633a5357e8f 100644
--- a/drivers/cpufreq/mediatek-cpufreq.c
+++ b/drivers/cpufreq/mediatek-cpufreq.c
@@ -23,6 +23,7 @@ struct mtk_cpufreq_platform_data {
 	int sram_min_volt;
 	int sram_max_volt;
 	bool ccifreq_supported;
+	unsigned int transition_delay_us;
 };
 
 /*
@@ -595,6 +596,7 @@ static int mtk_cpufreq_init(struct cpufreq_policy *policy)
 	policy->freq_table = freq_table;
 	policy->driver_data = info;
 	policy->clk = info->cpu_clk;
+	policy->transition_delay_us = info->soc_data->transition_delay_us;
 
 	return 0;
 }
@@ -689,6 +691,7 @@ static const struct mtk_cpufreq_platform_data mt2701_platform_data = {
 	.sram_min_volt = 0,
 	.sram_max_volt = 1150000,
 	.ccifreq_supported = false,
+	.transition_delay_us = 1000,
 };
 
 static const struct mtk_cpufreq_platform_data mt7622_platform_data = {
@@ -698,6 +701,7 @@ static const struct mtk_cpufreq_platform_data mt7622_platform_data = {
 	.sram_min_volt = 0,
 	.sram_max_volt = 1350000,
 	.ccifreq_supported = false,
+	.transition_delay_us = 1000,
 };
 
 static const struct mtk_cpufreq_platform_data mt7623_platform_data = {
@@ -705,6 +709,7 @@ static const struct mtk_cpufreq_platform_data mt7623_platform_data = {
 	.max_volt_shift = 200000,
 	.proc_max_volt = 1300000,
 	.ccifreq_supported = false,
+	.transition_delay_us = 1000,
 };
 
 static const struct mtk_cpufreq_platform_data mt8183_platform_data = {
@@ -714,6 +719,7 @@ static const struct mtk_cpufreq_platform_data mt8183_platform_data = {
 	.sram_min_volt = 0,
 	.sram_max_volt = 1150000,
 	.ccifreq_supported = true,
+	.transition_delay_us = 1000,
 };
 
 static const struct mtk_cpufreq_platform_data mt8186_platform_data = {
@@ -723,6 +729,7 @@ static const struct mtk_cpufreq_platform_data mt8186_platform_data = {
 	.sram_min_volt = 850000,
 	.sram_max_volt = 1118750,
 	.ccifreq_supported = true,
+	.transition_delay_us = 10000,
 };
 
 static const struct mtk_cpufreq_platform_data mt8516_platform_data = {
@@ -732,6 +739,7 @@ static const struct mtk_cpufreq_platform_data mt8516_platform_data = {
 	.sram_min_volt = 0,
 	.sram_max_volt = 1310000,
 	.ccifreq_supported = false,
+	.transition_delay_us = 1000,
 };
 
 /* List of machines supported by this driver */
-- 
2.18.0