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Message-ID: <CAMRc=MfVe7W1Jj6UVJ==GWaP-eFeWRyfcHuuTFvc+bQEYcpV5Q@mail.gmail.com>
Date: Fri, 18 Aug 2023 08:47:16 +0200
From: Bartosz Golaszewski <brgl@...ev.pl>
To: Andrew Halaney <ahalaney@...hat.com>
Cc: andersson@...nel.org, agross@...nel.org, konrad.dybcio@...aro.org,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sa8775p-ride: Describe sgmii_phy1 irq
On Thu, Aug 17, 2023 at 11:38 PM Andrew Halaney <ahalaney@...hat.com> wrote:
>
> There's an irq hooked up, so let's describe it.
>
> Prior to commit 9757300d2750
> ("pinctrl: qcom: Add intr_target_width field to support increased number of interrupt targets")
> one would not see the IRQ fire, despite some (invasive) debugging
> showing that the GPIO was in fact asserted, resulting in the interface
> staying down.
>
> Now that the IRQ is properly routed we can describe it.
>
> Signed-off-by: Andrew Halaney <ahalaney@...hat.com>
> ---
> arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
> index 8fde6935cd6e..9760bb4b468c 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
> @@ -295,6 +295,7 @@ sgmii_phy1: phy@a {
> compatible = "ethernet-phy-id0141.0dd4";
> reg = <0xa>;
> device_type = "ethernet-phy";
> + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>;
> reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
> reset-assert-us = <11000>;
> reset-deassert-us = <70000>;
> --
> 2.41.0
>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
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