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Message-ID: <CACRpkdYq=Ep4ji=Vy9k8X8cXE9_9gTS5T6eK_uP1M58v21sWbQ@mail.gmail.com>
Date: Fri, 18 Aug 2023 10:16:25 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Bjorn Andersson <andersson@...nel.org>,
Ninad Naik <quic_ninanaik@...cinc.com>,
Shazad Hussain <quic_shazhuss@...cinc.com>
Subject: [GIT PULL] pin control fixes for v6.5
Hi Linus,
here are some late fixes for v6.5 it's just two patches related
to a Qualcomm SoC but I think they put it into significant
devices so let's get the fixes out there.
Please pull it in!
Yours,
Linus Walleij
The following changes since commit fdf0eaf11452d72945af31804e2a1048ee1b574c:
Linux 6.5-rc2 (2023-07-16 15:10:37 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
tags/pinctrl-v6.5-3
for you to fetch changes up to 9757300d2750ef76f139aa6f5f7eadd61a0de0d3:
pinctrl: qcom: Add intr_target_width field to support increased
number of interrupt targets (2023-08-10 10:48:15 +0200)
----------------------------------------------------------------
Some pin control fixes for v6.5, fixes two issues with the
Qualcomm SA8775P platform:
- Some minor device tree binding flunky that is nice to iron
out but more importantly:
- Support the increased interrupt targets mask from 3 to 4
bits, making interrupts with higher (hardware) numbers
work.
----------------------------------------------------------------
Ninad Naik (1):
pinctrl: qcom: Add intr_target_width field to support increased
number of interrupt targets
Shazad Hussain (1):
dt-bindings: pinctrl: qcom,sa8775p-tlmm: add gpio function constant
Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml | 2 +-
drivers/pinctrl/qcom/pinctrl-msm.c | 9 ++++++---
drivers/pinctrl/qcom/pinctrl-msm.h | 2 ++
drivers/pinctrl/qcom/pinctrl-sa8775p.c | 1 +
4 files changed, 10 insertions(+), 4 deletions(-)
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