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Message-ID: <a7b640b9c1fe163a72183af04d089bd19326bfa8.1692372351.git.efectn@6tel.net>
Date: Fri, 18 Aug 2023 19:05:50 +0300
From: Muhammed Efe Cetin <efectn@...l.net>
To: linux-rockchip@...ts.infradead.org
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
heiko@...ech.de, sebastian.reichel@...labora.com, jonas@...boo.se,
megi@....cz, Muhammed Efe Cetin <efectn@...l.net>
Subject: [PATCH v2 2/3] arm64: dts: rockchip: Add sfc node to rk3588s
Add sfc node to rk3588s.dtsi from downstream kernel.
Signed-off-by: Muhammed Efe Cetin <efectn@...l.net>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 5544f66c6ff4..3c753f9b8acc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1424,6 +1424,18 @@ sata-port@0 {
};
};
+ sfc: spi@...b0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x0 0xfe2b0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+ clock-names = "clk_sfc", "hclk_sfc";
+ assigned-clocks = <&cru SCLK_SFC>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
sdmmc: mmc@...c0000 {
compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe2c0000 0x0 0x4000>;
--
2.41.0
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