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Message-Id: <1692627343-4380-2-git-send-email-quic_krichai@quicinc.com>
Date: Mon, 21 Aug 2023 19:45:41 +0530
From: Krishna chaitanya chundru <quic_krichai@...cinc.com>
To: manivannan.sadhasivam@...aro.org
Cc: helgaas@...nel.org, linux-pci@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
quic_vbadigan@...cinc.com, quic_nitegupt@...cinc.com,
quic_skananth@...cinc.com, quic_ramkri@...cinc.com,
quic_parass@...cinc.com, krzysztof.kozlowski@...aro.org,
Krishna chaitanya chundru <quic_krichai@...cinc.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS)
Subject: [PATCH v3 1/3] dt-bindings: pci: qcom: Add opp table
PCIe needs to choose the appropriate performance state of RPMH power
domain based upon the PCIe gen speed.
Adding the Operating Performance Points table allows to adjust power domain
performance state, depending on the PCIe gen speed.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 81971be4..779339c 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -121,6 +121,10 @@ properties:
description: GPIO controlled connection to WAKE# signal
maxItems: 1
+ operating-points-v2: true
+ opp-table:
+ type: object
+
required:
- compatible
- reg
--
2.7.4
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