linux-kernel - Re: [PATCH v4] serial: 8250_bcm7271: improve bcm7271 8250 port

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Message-ID: <ZOSdthfLS1v4TJlH@smile.fi.intel.com>
Date:   Tue, 22 Aug 2023 14:36:22 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Justin Chen <justin.chen@...adcom.com>
Cc:     linux-serial@...r.kernel.org, Al Cooper <alcooperx@...il.com>,
        Broadcom internal kernel review list 
        <bcm-kernel-feedback-list@...adcom.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jiri Slaby <jirislaby@...nel.org>,
        Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        John Ogness <john.ogness@...utronix.de>,
        Jiaqing Zhao <jiaqing.zhao@...ux.intel.com>,
        "open list:TTY LAYER" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4] serial: 8250_bcm7271: improve bcm7271 8250 port

On Mon, Aug 21, 2023 at 11:52:51AM -0700, Justin Chen wrote:
> The 8250 BCM7271 UART is not a direct match to PORT_16550A and other
> generic ports do not match its hardware capabilities. PORT_ALTR matches
> the rx trigger levels, but its vendor configurations are not compatible.
> Unfortunately this means we need to create another port to fully capture
> the hardware capabilities of the BCM7271 UART.
> 
> To alleviate some latency pressures, we default the rx trigger level to 8.

FWIW,
Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>

...

> +	[PORT_BCM7271] = {
> +		.name		= "Broadcom BCM7271 UART",
> +		.fifo_size	= 32,
> +		.tx_loadsz	= 32,
> +		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01,
> +		.rxtrig_bytes	= {1, 8, 16, 30},
> +		.flags		= UART_CAP_FIFO | UART_CAP_AFE,
> +	},

Strictly speaking it's better to keep this ordered according to the number, but
it's fine like this anyway.

-- 
With Best Regards,
Andy Shevchenko