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Message-ID: <alpine.DEB.2.21.2308220330360.49340@angie.orcam.me.uk>
Date:   Tue, 22 Aug 2023 15:36:36 +0100 (BST)
From:   "Maciej W. Rozycki" <macro@...am.me.uk>
To:     Mika Westerberg <mika.westerberg@...ux.intel.com>
cc:     Sanath S <sanaths2@....com>, Bjorn Helgaas <bhelgaas@...gle.com>,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        mario.limonciello@....com, Sanjay R Mehta <sanju.mehta@....com>
Subject: Re: [PATCH] PCI: Allocate maximum available buses to help extending
 the daisy chain

On Fri, 18 Aug 2023, Mika Westerberg wrote:

> > > > > Link: https://bugzilla.kernel.org/show_bug.cgi?id=216000
> > > Did you get confirmation that this actually solves the issue?
> > I've tested this on my setup, it is resolving the issue.
> 
> Right, but it would be good to get confirmation from the person who
> reported the issue that this actually helps. There is nothing in the
> bugzilla whether the patch worked or not.

 If you do change the defaults, then please don't forget to update 
Documentation/admin-guide/kernel-parameters.txt in the same commit 
accordingly for `hpbussize=nn', etc.

 NB it seems a common problem with vendor firmware failing to assign a 
reasonable quantity of downstream buses for hot-plug ports.  E.g. with my 
production laptop back from 2018 a single-device ExpressCard option, such 
as a PCIe serial port works just fine with hot-plug, however if I hot-plug 
a whole bus hierarchy in an external enclosure, then the system runs out 
of buses at the first PCIe switch (unless I use `hpbussize=nn', etc.).

  Maciej

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