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Message-ID: <CAGXv+5FKpt0uxPPBTd0D0+PSD068NJFSf2AuQ5nckK8KW7WNag@mail.gmail.com>
Date:   Wed, 23 Aug 2023 16:34:49 +0800
From:   Chen-Yu Tsai <wenst@...omium.org>
To:     Shuijing Li <shuijing.li@...iatek.com>
Cc:     chunkuang.hu@...nel.org, p.zabel@...gutronix.de, airlied@...il.com,
        daniel@...ll.ch, matthias.bgg@...il.com,
        angelogioacchino.delregno@...labora.com, jitao.shi@...iatek.com,
        linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com,
        linux-mediatek@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] drm/mediatek: Support IGT in dp driver

On Wed, Aug 23, 2023 at 4:25 PM Shuijing Li <shuijing.li@...iatek.com> wrote:
>
> Support IGT (Intel GPU Tools) in Mediatek DisplayPort driver

The commit message makes little sense.

First of all, you are changing the DSI driver, not the DisplayPort driver.

Second, the subject should say what was changed. In this case it would be
something like "Add mode_valid callback to DSI bridge". "Support IGT" is
*why* the change was done, should only be mentioned in the commit message
body, and you could be more specific about which test in IGT needs it.

ChenYu

> Signed-off-by: Shuijing Li <shuijing.li@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dsi.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 7d5250351193..a494e04f0ddf 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -806,6 +806,25 @@ static void mtk_dsi_bridge_atomic_post_disable(struct drm_bridge *bridge,
>         mtk_dsi_poweroff(dsi);
>  }
>
> +static enum drm_mode_status
> +mtk_dsi_bridge_mode_valid(struct drm_bridge *bridge,
> +                         const struct drm_display_info *info,
> +                         const struct drm_display_mode *mode)
> +{
> +       struct mtk_dsi *dsi = bridge_to_dsi(bridge);
> +       u32 bpp;
> +
> +       if (dsi->format == MIPI_DSI_FMT_RGB565)
> +               bpp = 16;
> +       else
> +               bpp = 24;
> +
> +       if (mode->clock * bpp / dsi->lanes > 1500000)
> +               return MODE_CLOCK_HIGH;
> +
> +       return MODE_OK;
> +}
> +
>  static const struct drm_bridge_funcs mtk_dsi_bridge_funcs = {
>         .attach = mtk_dsi_bridge_attach,
>         .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
> @@ -815,6 +834,7 @@ static const struct drm_bridge_funcs mtk_dsi_bridge_funcs = {
>         .atomic_pre_enable = mtk_dsi_bridge_atomic_pre_enable,
>         .atomic_post_disable = mtk_dsi_bridge_atomic_post_disable,
>         .atomic_reset = drm_atomic_helper_bridge_reset,
> +       .mode_valid = mtk_dsi_bridge_mode_valid,
>         .mode_set = mtk_dsi_bridge_mode_set,
>  };
>
> --
> 2.40.1
>

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