linux-kernel - Re: [PATCH v2 2/2] mtd: spinand: micron: fixing the offset for OOB

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Message-ID: <20230823104143.760cc5bc@xps-13>
Date:   Wed, 23 Aug 2023 10:41:43 +0200
From:   Miquel Raynal <miquel.raynal@...tlin.com>
To:     Martin Kurbanov <mmkurbanov@...rdevices.ru>
Cc:     Richard Weinberger <richard@....at>,
        Vignesh Raghavendra <vigneshr@...com>,
        <linux-kernel@...r.kernel.org>, <linux-mtd@...ts.infradead.org>,
        <kernel@...rdevices.ru>
Subject: Re: [PATCH v2 2/2] mtd: spinand: micron: fixing the offset for OOB

Hi Martin,

mmkurbanov@...rdevices.ru wrote on Tue, 22 Aug 2023 19:57:11 +0300:

> Hi Miquel,
> 
> On 22.08.2023 16:35, Miquel Raynal wrote:
> > Hi Martin,
> > 
> > mmkurbanov@...rdevices.ru wrote on Tue, 22 Aug 2023 15:25:34 +0300:
> >   
> >> The first 4 bytes are reserved for bad block data.  
> > 
> > Are you sure about that? I've never seen 4-bytes BBM.  
> 
> Yes, I'm sure. I have checked in all the relevant datasheets:
> ----------------------------------------------------------------------------------
> |        Name        | Max Byte | Min Byte |  Area   |        Description        |
> |                    | Address  | Address  |         |                           |
> |--------------------+----------+----------+---------+---------------------------|
> | MT29F2G01ABAGD [1] |          |          |         |                           |
> |--------------------|          |          |         |                           |
> | MT29F2G01ABBGD [2] |          |          |         |                           |
> |--------------------|   803h   |   800h   |         |                           |
> | MT29F1G01ABAFD [3] |          |          |         |                           |
> |--------------------|          |          |         |                           |
> | MT29F4G01ADAGD [4] |          |          |         |                           |
> |--------------------+----------+----------| Spare 0 | Reserved (bad block data) |
> | MT29F4G01ABAFD [5] |          |          |         |                           |
> |--------------------|          |          |         |                           |
> | MT29F4G01ABBFD [6] |          |          |         |                           |
> |--------------------|  1003h   |  1000h   |         |                           |
> | MT29F8G01ADAFD [7] |          |          |         |                           |
> |--------------------|          |          |         |                           |
> | MT29F8G01ADBFD [8] |          |          |         |                           |
> ----------------------------------------------------------------------------------
> 
> Note: to view the datasheet on the Micron (https://www.micron.com/) website, you need
> to register.

I don't think the four bytes have any "bad block specific" meaning. In
practice, the datasheet states:

	Value programmed for bad block at the first byte of spare
	area: 00h

So only the first byte is used to mark the block bad, the rest is
probably marked "reserved" for simplicity. I believe we should keep the
current layout because it would otherwise break users for no real
reason.

> Links:
>   [1] https://datasheet.lcsc.com/lcsc/1912111437_Micron-Tech-MT29F2G01ABAGDWB-IT-G_C410863.pdf - page 45
>   [2] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nand-flash/70-series/m79a_2gb_1_8v_nand_spi.pdf - page 46
>   [3] https://datasheet.lcsc.com/lcsc/2209201030_Micron-Tech-MT29F1G01ABAFDWB-IT-F_C2905686.pdf - page 46
>   [4] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nand-flash/70-series/m79a_ddp_4gb_3v_nand_spi.pdf - page 46
>   [5] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nand-flash/70-series/m70a_4gb_3v_nand_spi.pdf - page 47
>   [6] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nand-flash/70-series/m70a_4gb_1_8v_nand_spi.pdf - page 49
>   [7] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nand-flash/70-series/m70a_ddp_8gb_3v_nand_spi.pdf - page 48
>   [8] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nand-flash/70-series/m70a_ddp_8gb_1_8v_nand_spi.pdf - page 48
> 

Thanks,
Miquèl