linux-kernel - Re: [PATCH v2 07/41] mtd: spi-nor: store .n_banks in struct spi_nor_flash

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <a6dc9a8e-5225-3768-08f4-0cf7800aa438@linaro.org>
Date:   Thu, 24 Aug 2023 09:41:41 +0100
From:   Tudor Ambarus <tudor.ambarus@...aro.org>
To:     Michael Walle <mwalle@...nel.org>,
        Pratyush Yadav <pratyush@...nel.org>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Richard Weinberger <richard@....at>,
        Vignesh Raghavendra <vigneshr@...com>
Cc:     linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org
Subject: Re: [PATCH v2 07/41] mtd: spi-nor: store .n_banks in struct
 spi_nor_flash_parameter



On 8/22/23 08:09, Michael Walle wrote:
> First, fixups might want to replace the n_banks parameter, thus we need
> it in the (writable) parameter struct. Secondly, this way we can have a
> default in the core and just skip setting the n_banks in the flash_info
> database. Most of the flashes doesn't have more than one bank.
> 
> Signed-off-by: Michael Walle <mwalle@...nel.org>
> Reviewed-by: Miquel Raynal <miquel.raynal@...tlin.com>

Reviewed-by: Tudor Ambarus <tudor.ambarus@...aro.org>

> ---
>  drivers/mtd/spi-nor/core.c | 7 ++++---
>  drivers/mtd/spi-nor/core.h | 2 ++
>  2 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index d27ad1295ee0..e27f1323fa0b 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -2862,7 +2862,7 @@ static void spi_nor_init_flags(struct spi_nor *nor)
>  	if (flags & NO_CHIP_ERASE)
>  		nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
>  
> -	if (flags & SPI_NOR_RWW && nor->info->n_banks > 1 &&
> +	if (flags & SPI_NOR_RWW && nor->params->n_banks > 1 &&
>  	    !nor->controller_ops)
>  		nor->flags |= SNOR_F_RWW;
>  }
> @@ -2926,8 +2926,8 @@ static int spi_nor_late_init_params(struct spi_nor *nor)
>  	if (nor->flags & SNOR_F_HAS_LOCK && !nor->params->locking_ops)
>  		spi_nor_init_default_locking_ops(nor);
>  
> -	if (nor->info->n_banks > 1)
> -		params->bank_size = div64_u64(params->size, nor->info->n_banks);
> +	if (params->n_banks > 1)
> +		params->bank_size = div64_u64(params->size, params->n_banks);
>  
>  	return 0;
>  }
> @@ -2997,6 +2997,7 @@ static void spi_nor_init_default_params(struct spi_nor *nor)
>  	params->size = info->size;
>  	params->bank_size = params->size;
>  	params->page_size = info->page_size ?: SPI_NOR_DEFAULT_PAGE_SIZE;
> +	params->n_banks = info->n_banks;
>  
>  	if (!(info->flags & SPI_NOR_NO_FR)) {
>  		/* Default to Fast Read for DT and non-DT platform devices. */
> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
> index 25bc18197614..2fc999f2787c 100644
> --- a/drivers/mtd/spi-nor/core.h
> +++ b/drivers/mtd/spi-nor/core.h
> @@ -358,6 +358,7 @@ struct spi_nor_otp {
>   *			in octal DTR mode.
>   * @rdsr_addr_nbytes:	dummy address bytes needed for Read Status Register
>   *			command in octal DTR mode.
> + * @n_banks:		number of banks.
>   * @n_dice:		number of dice in the flash memory.
>   * @vreg_offset:	volatile register offset for each die.
>   * @hwcaps:		describes the read and page program hardware
> @@ -394,6 +395,7 @@ struct spi_nor_flash_parameter {
>  	u8				addr_mode_nbytes;
>  	u8				rdsr_dummy;
>  	u8				rdsr_addr_nbytes;
> +	u8				n_banks;
>  	u8				n_dice;
>  	u32				*vreg_offset;
>  
>