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Message-ID: <f3f05dfe-a8eb-6d73-f51d-470104782655@quicinc.com>
Date: Thu, 24 Aug 2023 16:10:13 +0800
From: Jie Luo <quic_luoj@...cinc.com>
To: Stephen Boyd <sboyd@...nel.org>, <agross@...nel.org>,
<andersson@...nel.org>, <catalin.marinas@....com>,
<conor+dt@...nel.org>, <konrad.dybcio@...aro.org>,
<krzysztof.kozlowski+dt@...aro.org>, <mturquette@...libre.com>,
<p.zabel@...gutronix.de>, <robh+dt@...nel.org>, <will@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<quic_srichara@...cinc.com>
Subject: Re: [PATCH v5 1/4] clk: qcom: branch: Add clk_branch2_mdio_ops
On 8/24/2023 2:04 AM, Stephen Boyd wrote:
> Quoting Luo Jie (2023-08-23 01:50:28)
>> diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c
>> index fc4735f74f0f..5e08c026ca4a 100644
>> --- a/drivers/clk/qcom/clk-branch.c
>> +++ b/drivers/clk/qcom/clk-branch.c
>> @@ -153,3 +153,10 @@ const struct clk_ops clk_branch_simple_ops = {
>> .is_enabled = clk_is_enabled_regmap,
>> };
>> EXPORT_SYMBOL_GPL(clk_branch_simple_ops);
>> +
>> +const struct clk_ops clk_branch2_mdio_ops = {
>> + .prepare = clk_branch2_enable,
>> + .unprepare = clk_branch2_disable,
>> + .is_prepared = clk_is_enabled_regmap,
>> +};
>> +EXPORT_SYMBOL_GPL(clk_branch2_mdio_ops);
>
> I'd call it clk_branch2_simple_prepare_ops or something like that.
> There's nothing mdio specific about it.
Thanks Stephen for the proposal.
As for qcom clock controller, only the device accessed by MDIO bus has
this kind of ops, the clk_branch2_mdio_ops can also imply that the MDIO
bus is used for accessing the HW register, i think this is also the
reason that Konrad suggested this ops name.
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