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Message-ID: <CAAd53p4Ey15SRkeW-5rDQfxrT8Cif+hYOk2BZ6iQpfd8s51wEw@mail.gmail.com>
Date: Thu, 24 Aug 2023 21:46:00 +0800
From: Kai-Heng Feng <kai.heng.feng@...onical.com>
To: Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: bhelgaas@...gle.com, koba.ko@...onical.com,
sathyanarayanan.kuppuswamy@...ux.intel.com,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] PCI: Add helper to check if any of ancestor device
support D3cold
Hi,
On Thu, Aug 24, 2023 at 7:57 PM Mika Westerberg
<mika.westerberg@...ux.intel.com> wrote:
>
> Hi,
>
> On Thu, Aug 24, 2023 at 12:46:43PM +0800, Kai-Heng Feng wrote:
> > In addition to nearest upstream bridge, driver may want to know if the
> > entire hierarchy can be powered off to perform different action.
> >
> > So walk higher up the hierarchy to find out if any device has valid
> > _PR3.
>
> I'm not entirely sure this is good idea. The drivers should expect that
> the power will be turned off pretty soon after device enters D3hot. Also
> _PR3 is not PCI concept it's ACPI concept so API like this would only
> work on systems with ACPI.
IIUC, Bjorn wants to limit the AER/DPC disablement when device power
is really off.
Is "the power will be turned off pretty soon after device enters
D3hot" applicable to most devices? Since config space is still
accessible when device is in D3hot.
Unless there are cases when device firmware behave differently to
D3hot? Then maybe it's better to disable AER for both D3hot, D3cold
and system S3.
Kai-Heng
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