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Message-Id: <20230825-topic-6115tx-v1-2-ebed201ad54b@linaro.org>
Date: Fri, 25 Aug 2023 19:23:13 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Banajit Goswami <bgoswami@...cinc.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>
Cc: Marijn Suijten <marijn.suijten@...ainline.org>,
alsa-devel@...a-project.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: [PATCH 2/2] ASoC: codecs: lpass-tx-macro: Add SM6115 support
SM6115 has a TX macro, which surprisingly doesn't host a SWR master.
Conditionally skip the SWR reset sequence on this platform.
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
sound/soc/codecs/lpass-macro-common.h | 2 ++
sound/soc/codecs/lpass-tx-macro.c | 22 +++++++++++++++-------
2 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/sound/soc/codecs/lpass-macro-common.h b/sound/soc/codecs/lpass-macro-common.h
index 4eb886565ea3..d3684c7ab930 100644
--- a/sound/soc/codecs/lpass-macro-common.h
+++ b/sound/soc/codecs/lpass-macro-common.h
@@ -8,6 +8,8 @@
/* NPL clock is expected */
#define LPASS_MACRO_FLAG_HAS_NPL_CLOCK BIT(0)
+/* The soundwire block should be internally reset at probe */
+#define LPASS_MACRO_FLAG_RESET_SWR BIT(1)
struct lpass_macro {
struct device *macro_pd;
diff --git a/sound/soc/codecs/lpass-tx-macro.c b/sound/soc/codecs/lpass-tx-macro.c
index 3e33418898e8..82f9873ffada 100644
--- a/sound/soc/codecs/lpass-tx-macro.c
+++ b/sound/soc/codecs/lpass-tx-macro.c
@@ -2045,15 +2045,19 @@ static int tx_macro_probe(struct platform_device *pdev)
if (ret)
goto err_fsgen;
+
/* reset soundwire block */
- regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
- CDC_TX_SWR_RESET_MASK, CDC_TX_SWR_RESET_ENABLE);
+ if (flags & LPASS_MACRO_FLAG_RESET_SWR)
+ regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
+ CDC_TX_SWR_RESET_MASK, CDC_TX_SWR_RESET_ENABLE);
regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
CDC_TX_SWR_CLK_EN_MASK,
CDC_TX_SWR_CLK_ENABLE);
- regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
- CDC_TX_SWR_RESET_MASK, 0x0);
+
+ if (flags & LPASS_MACRO_FLAG_RESET_SWR)
+ regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
+ CDC_TX_SWR_RESET_MASK, 0x0);
ret = devm_snd_soc_register_component(dev, &tx_macro_component_drv,
tx_macro_dai,
@@ -2158,18 +2162,22 @@ static const struct dev_pm_ops tx_macro_pm_ops = {
static const struct of_device_id tx_macro_dt_match[] = {
{
.compatible = "qcom,sc7280-lpass-tx-macro",
+ .data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
+ }, {
+ .compatible = "qcom,sm6115-lpass-tx-macro",
.data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
}, {
.compatible = "qcom,sm8250-lpass-tx-macro",
- .data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
+ .data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
}, {
.compatible = "qcom,sm8450-lpass-tx-macro",
- .data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
+ .data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
}, {
.compatible = "qcom,sm8550-lpass-tx-macro",
+ .data = (void *)LPASS_MACRO_FLAG_RESET_SWR,
}, {
.compatible = "qcom,sc8280xp-lpass-tx-macro",
- .data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
+ .data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR),
},
{ }
};
--
2.42.0
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